DE69411337D1 - Verfahren zur Bildung einer Schaltung mittels eines Lasers und dadurch gebildete Komponente - Google Patents

Verfahren zur Bildung einer Schaltung mittels eines Lasers und dadurch gebildete Komponente

Info

Publication number
DE69411337D1
DE69411337D1 DE69411337T DE69411337T DE69411337D1 DE 69411337 D1 DE69411337 D1 DE 69411337D1 DE 69411337 T DE69411337 T DE 69411337T DE 69411337 T DE69411337 T DE 69411337T DE 69411337 D1 DE69411337 D1 DE 69411337D1
Authority
DE
Germany
Prior art keywords
laser
circuit
forming
component formed
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69411337T
Other languages
English (en)
Other versions
DE69411337T2 (de
Inventor
Takayuki Miyashita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Polyplastics Co Ltd
Original Assignee
Polyplastics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Polyplastics Co Ltd filed Critical Polyplastics Co Ltd
Application granted granted Critical
Publication of DE69411337D1 publication Critical patent/DE69411337D1/de
Publication of DE69411337T2 publication Critical patent/DE69411337T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/027—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0284—Details of three-dimensional rigid printed circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09118—Moulded substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09363—Conductive planes wherein only contours around conductors are removed for insulation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107—Using laser light
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1333—Deposition techniques, e.g. coating
    • H05K2203/135—Electrophoretic deposition of insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S205/00—Electrolysis: processes, compositions used therein, and methods of preparing the compositions
    • Y10S205/917—Treatment of workpiece between coating steps
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S205/00—Electrolysis: processes, compositions used therein, and methods of preparing the compositions
    • Y10S205/918—Use of wave energy or electrical discharge during pretreatment of substrate or post-treatment of coating

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Laser Beam Processing (AREA)
  • Electroplating Methods And Accessories (AREA)
DE69411337T 1993-08-26 1994-08-24 Verfahren zur Bildung einer Schaltung mittels eines Lasers und dadurch gebildete Komponente Expired - Lifetime DE69411337T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21137293A JP3159841B2 (ja) 1993-08-26 1993-08-26 レーザーによる回路形成方法及び導電回路形成部品

Publications (2)

Publication Number Publication Date
DE69411337D1 true DE69411337D1 (de) 1998-08-06
DE69411337T2 DE69411337T2 (de) 1999-02-25

Family

ID=16604876

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69411337T Expired - Lifetime DE69411337T2 (de) 1993-08-26 1994-08-24 Verfahren zur Bildung einer Schaltung mittels eines Lasers und dadurch gebildete Komponente

Country Status (4)

Country Link
US (1) US5525205A (de)
EP (1) EP0641152B1 (de)
JP (1) JP3159841B2 (de)
DE (1) DE69411337T2 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5800724A (en) * 1996-02-14 1998-09-01 Fort James Corporation Patterned metal foil laminate and method for making same
JP3442403B2 (ja) 1997-03-11 2003-09-02 シーメンス ソシエテ アノニム 電気絶縁性支持体上に金属導体路パターンを形成させる方法
DE19746893B4 (de) * 1997-10-23 2005-09-01 Siemens Ag Optoelektronisches Bauelement mit Wärmesenke im Sockelteil und Verfahren zur Herstellung
JP3660175B2 (ja) * 1998-11-25 2005-06-15 セイコーエプソン株式会社 実装構造体及び液晶装置の製造方法
US6388230B1 (en) * 1999-10-13 2002-05-14 Morton International, Inc. Laser imaging of thin layer electronic circuitry material
US6673227B2 (en) * 2000-05-29 2004-01-06 Siemens Production & Logistics Systems Ag Process for producing three-dimensional, selectively metallized parts
EP1191127B1 (de) * 2000-09-26 2004-10-13 Enthone-OMI (Deutschland) GmbH Verfahren zur selektiven Metallisierung dielektrischer Materialien
JP3867017B2 (ja) * 2002-05-24 2007-01-10 Ｔｄｋ株式会社 パターン形成方法、マイクロデバイスの製造方法、薄膜磁気ヘッドの製造方法、磁気ヘッドスライダの製造方法、磁気ヘッド装置の製造方法、磁気記録再生装置の製造方法
DE102004006414B4 (de) * 2004-02-09 2008-08-21 Lpkf Laser & Elektronika D.O.O. Verfahren zum partiellen Lösen einer leitfähigen Schicht
JP4293178B2 (ja) * 2005-11-09 2009-07-08 パナソニック電工株式会社 立体回路基板の製造方法
DE102006007397B3 (de) * 2006-02-17 2007-04-12 Forschungszentrum Karlsruhe Gmbh Verfahren zur Herstellung einer Schicht auf einem Formkörper und dessen Verwendung
US20080063866A1 (en) * 2006-05-26 2008-03-13 Georgia Tech Research Corporation Method for Making Electrically Conductive Three-Dimensional Structures
TWI409915B (zh) * 2009-04-21 2013-09-21 The bearing structure of electronic component and its preparation method
US20100307799A1 (en) * 2009-06-06 2010-12-09 Chiang Cheng-Feng Carrier Structure for Electronic Components and Fabrication Method of the same
DE102010019407B4 (de) 2010-05-04 2013-06-27 Lpkf Laser & Electronics Ag Verfahren zum Einbringen elektrischer Isolierungen in Leiterplatten
DE102010019406B4 (de) 2010-05-04 2012-06-21 Lpkf Laser & Electronics Ag Verfahren zum partiellen Lösen einer definierten Fläche einer leitfähigen Schicht
CN102892252B (zh) * 2011-07-19 2015-08-05 联滔电子有限公司 三维电路的制造方法
KR101290670B1 (ko) * 2013-06-03 2013-07-29 구본술 도금 신뢰성 향상 기능을 갖는 내장형 안테나 제조방법
JP2016035998A (ja) * 2014-08-05 2016-03-17 佳邦科技股▲ふん▼有限公司Ｉｎｐａｑ Ｔｅｃｈｎｏｌｏｇｙ Ｃｏ．， Ｌｔｄ． レーザー彫刻により３次元立体回路を製造する方法
CN114919139A (zh) * 2022-05-27 2022-08-19 温州金瑞祥金银制品有限公司 一种工艺品亚光成型方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4081653A (en) * 1976-12-27 1978-03-28 Western Electric Co., Inc. Removal of thin films from substrates by laser induced explosion
JPS6483391A (en) * 1987-09-22 1989-03-29 Nec Corp Method for forming conductor pattern of circuit board
US4943346A (en) * 1988-09-29 1990-07-24 Siemens Aktiengesellschaft Method for manufacturing printed circuit boards
JPH02105596A (ja) * 1988-10-14 1990-04-18 Toyama Nippon Denki Kk 印刷配線板の製造方法
US4898648A (en) * 1988-11-15 1990-02-06 Pacific Bell Method for providing a strengthened conductive circuit pattern
EP0543045B1 (de) * 1991-11-21 1995-09-20 Siemens Aktiengesellschaft Verfahren zur Herstellung von Leiterplatten

Also Published As

Publication number Publication date
DE69411337T2 (de) 1999-02-25
EP0641152A1 (de) 1995-03-01
EP0641152B1 (de) 1998-07-01
US5525205A (en) 1996-06-11
JP3159841B2 (ja) 2001-04-23
JPH0766531A (ja) 1995-03-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: POLYPLASTICS CO. LTD., TOKIO/TOKYO, JP