DE69324778T2 - Gerät und Verfahren zum Starten eines Mehrprozessorsystems mit einer Global/Lokalspeicherarchitektur - Google Patents

Gerät und Verfahren zum Starten eines Mehrprozessorsystems mit einer Global/Lokalspeicherarchitektur

Info

Publication number
DE69324778T2
DE69324778T2 DE69324778T DE69324778T DE69324778T2 DE 69324778 T2 DE69324778 T2 DE 69324778T2 DE 69324778 T DE69324778 T DE 69324778T DE 69324778 T DE69324778 T DE 69324778T DE 69324778 T2 DE69324778 T2 DE 69324778T2
Authority
DE
Germany
Prior art keywords
processor
global memory
booting
reset
global
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69324778T
Other languages
English (en)
Other versions
DE69324778D1 (de
Inventor
William Rudolph Hardell
James Dodd Henson
Oscar Reid Mitchell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE69324778D1 publication Critical patent/DE69324778D1/de
Application granted granted Critical
Publication of DE69324778T2 publication Critical patent/DE69324778T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17356—Indirect interconnection networks
    • G06F15/17368—Indirect interconnection networks non hierarchical topologies
    • G06F15/17375—One dimensional, e.g. linear array, ring
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4403—Processor initialisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Computer Security & Cryptography (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE69324778T 1992-10-30 1993-11-01 Gerät und Verfahren zum Starten eines Mehrprozessorsystems mit einer Global/Lokalspeicherarchitektur Expired - Fee Related DE69324778T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/969,596 US5448716A (en) 1992-10-30 1992-10-30 Apparatus and method for booting a multiple processor system having a global/local memory architecture

Publications (2)

Publication Number Publication Date
DE69324778D1 DE69324778D1 (de) 1999-06-10
DE69324778T2 true DE69324778T2 (de) 1999-12-09

Family

ID=25515723

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69324778T Expired - Fee Related DE69324778T2 (de) 1992-10-30 1993-11-01 Gerät und Verfahren zum Starten eines Mehrprozessorsystems mit einer Global/Lokalspeicherarchitektur

Country Status (6)

Country Link
US (1) US5448716A (de)
EP (1) EP0602791B1 (de)
JP (1) JPH06231097A (de)
AT (1) ATE179812T1 (de)
CA (1) CA2099413C (de)
DE (1) DE69324778T2 (de)

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KR100240572B1 (ko) * 1996-12-05 2000-01-15 윤종용 프로그램 메모리를 공유하는 멀티 프로세서 시스템
JP3180728B2 (ja) * 1997-07-25 2001-06-25 日本電気株式会社 半導体記憶装置
US6058475A (en) * 1997-09-22 2000-05-02 Ncr Corporation Booting method for multi-processor computer
US7194092B1 (en) * 1998-10-26 2007-03-20 Microsoft Corporation Key-based secure storage
US20050060549A1 (en) * 1998-10-26 2005-03-17 Microsoft Corporation Controlling access to content based on certificates and access predicates
US7174457B1 (en) * 1999-03-10 2007-02-06 Microsoft Corporation System and method for authenticating an operating system to a central processing unit, providing the CPU/OS with secure storage, and authenticating the CPU/OS to a third party
US6701429B1 (en) * 1998-12-03 2004-03-02 Telefonaktiebolaget Lm Ericsson(Publ) System and method of start-up in efficient way for multi-processor systems based on returned identification information read from pre-determined memory location
US6601165B2 (en) * 1999-03-26 2003-07-29 Hewlett-Packard Company Apparatus and method for implementing fault resilient booting in a multi-processor system by using a flush command to control resetting of the processors and isolating failed processors
JP4144990B2 (ja) * 2000-01-14 2008-09-03 富士通株式会社 データ処理システム及び初期化方法
US6487464B1 (en) * 2000-02-25 2002-11-26 Intel Corporation Power-on software for robust boot
US6584560B1 (en) 2000-04-19 2003-06-24 Dell Usa, L.P. Method and system for booting a multiprocessor computer
US20020029334A1 (en) * 2000-07-26 2002-03-07 West Karlon K. High availability shared memory system
US6892298B2 (en) 2000-07-26 2005-05-10 Times N Systems, Inc. Load/store micropacket handling system
US6715059B2 (en) 2000-07-26 2004-03-30 Tas Holdings, Inc. Methods and systems for a shared memory unit with extendable functions
US6675277B2 (en) 2000-07-26 2004-01-06 Tns Holdings, Inc. Method and apparatus for demand usable adapter memory access management
US6782440B2 (en) 2000-07-26 2004-08-24 T.N.S. Holdings, Inc. Resource locking and thread synchronization in a multiprocessor environment
US6665777B2 (en) 2000-07-26 2003-12-16 Tns Holdings, Inc. Method, apparatus, network, and kit for multiple block sequential memory management
AU2002302563A1 (en) * 2001-05-19 2002-12-03 International Business Machines Corporation Electronic system and method for booting of an electronic system
US6948079B2 (en) * 2001-12-26 2005-09-20 Intel Corporation Method and apparatus for providing supply voltages for a processor
US7032106B2 (en) 2001-12-27 2006-04-18 Computer Network Technology Corporation Method and apparatus for booting a microprocessor
US20030126477A1 (en) * 2001-12-28 2003-07-03 Zhang Kevin X. Method and apparatus for controlling a supply voltage to a processor
US7890771B2 (en) 2002-04-17 2011-02-15 Microsoft Corporation Saving and retrieving data based on public key encryption
US7487365B2 (en) * 2002-04-17 2009-02-03 Microsoft Corporation Saving and retrieving data based on symmetric key encryption
US7100034B2 (en) * 2003-05-23 2006-08-29 Hewlett-Packard Development Company, L.P. System for selecting another processor to be the boot strap processor when the default boot strap processor does not have local memory
WO2007091297A1 (ja) * 2006-02-06 2007-08-16 Fujitsu Limited 情報処理装置、ｃｐｕ、診断プログラムおよび診断方法
US7702893B1 (en) * 2006-09-22 2010-04-20 Altera Corporation Integrated circuits with configurable initialization data memory addresses
US7711941B2 (en) * 2006-12-19 2010-05-04 Lsi Corporation Method and apparatus for booting independent operating systems in a multi-processor core integrated circuit
US7814301B2 (en) * 2007-04-11 2010-10-12 Hewlett-Packard Development Company, L.P. Clock architecture for multi-processor systems
US8862922B2 (en) * 2010-01-14 2014-10-14 International Business Machines Corporation Data center power adjustment
US9037838B1 (en) * 2011-09-30 2015-05-19 Emc Corporation Multiprocessor messaging system
JP2017135762A (ja) 2014-06-03 2017-08-03 三菱電機株式会社 圧力タンク、これを用いたガス絶縁開閉装置および圧力タンクの製造方法

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Also Published As

Publication number Publication date
JPH06231097A (ja) 1994-08-19
ATE179812T1 (de) 1999-05-15
DE69324778D1 (de) 1999-06-10
US5448716A (en) 1995-09-05
CA2099413C (en) 1999-02-16
EP0602791A3 (de) 1997-03-19
EP0602791A2 (de) 1994-06-22
EP0602791B1 (de) 1999-05-06
CA2099413A1 (en) 1994-05-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee