DE69322223T2 - Kontaktierungsverfahren für eine Halbleitervorrichtung - Google Patents

Kontaktierungsverfahren für eine Halbleitervorrichtung

Info

Publication number
DE69322223T2
DE69322223T2 DE69322223T DE69322223T DE69322223T2 DE 69322223 T2 DE69322223 T2 DE 69322223T2 DE 69322223 T DE69322223 T DE 69322223T DE 69322223 T DE69322223 T DE 69322223T DE 69322223 T2 DE69322223 T2 DE 69322223T2
Authority
DE
Germany
Prior art keywords
semiconductor device
contacting method
contacting
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69322223T
Other languages
English (en)
Other versions
DE69322223D1 (de
Inventor
Michael Cherniawski
Vidya S Kaushik
Jeffrey M Barker
Ronald E Pyle
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of DE69322223D1 publication Critical patent/DE69322223D1/de
Application granted granted Critical
Publication of DE69322223T2 publication Critical patent/DE69322223T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/019—Contacts of silicides
DE69322223T 1992-09-24 1993-07-09 Kontaktierungsverfahren für eine Halbleitervorrichtung Expired - Fee Related DE69322223T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/950,333 US5236852A (en) 1992-09-24 1992-09-24 Method for contacting a semiconductor device

Publications (2)

Publication Number Publication Date
DE69322223D1 DE69322223D1 (de) 1999-01-07
DE69322223T2 true DE69322223T2 (de) 1999-06-02

Family

ID=25490286

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69322223T Expired - Fee Related DE69322223T2 (de) 1992-09-24 1993-07-09 Kontaktierungsverfahren für eine Halbleitervorrichtung

Country Status (5)

Country Link
US (1) US5236852A (de)
EP (1) EP0589159B1 (de)
JP (1) JPH06204163A (de)
KR (1) KR940007993A (de)
DE (1) DE69322223T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5801065A (en) * 1994-02-03 1998-09-01 Universal Semiconductor, Inc. Structure and fabrication of semiconductor device having merged resistive/capacitive plate and/or surface layer that provides ESD protection
JP3326267B2 (ja) * 1994-03-01 2002-09-17 三菱電機株式会社 半導体装置およびその製造方法
US5705442A (en) * 1995-10-27 1998-01-06 Vanguard International Semiconductor Corporation Optimized tungsten contact plug process via use of furnace annealed barrier layers
US6750091B1 (en) * 1996-03-01 2004-06-15 Micron Technology Diode formation method
US5998873A (en) * 1998-12-16 1999-12-07 National Semiconductor Corporation Low contact resistance and low junction leakage metal interconnect contact structure
US6689676B1 (en) * 2002-07-26 2004-02-10 Motorola, Inc. Method for forming a semiconductor device structure in a semiconductor layer
US9373542B2 (en) * 2013-11-15 2016-06-21 GlobalFoundries, Inc. Integrated circuits and methods for fabricating integrated circuits with improved contact structures

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3699646A (en) * 1970-12-28 1972-10-24 Intel Corp Integrated circuit structure and method for making integrated circuit structure
US4208781A (en) * 1976-09-27 1980-06-24 Texas Instruments Incorporated Semiconductor integrated circuit with implanted resistor element in polycrystalline silicon layer
US4164461A (en) * 1977-01-03 1979-08-14 Raytheon Company Semiconductor integrated circuit structures and manufacturing methods
US4290185A (en) * 1978-11-03 1981-09-22 Mostek Corporation Method of making an extremely low current load device for integrated circuit
US4367580A (en) * 1980-03-21 1983-01-11 Texas Instruments Incorporated Process for making polysilicon resistors
US4397076A (en) * 1981-09-14 1983-08-09 Ncr Corporation Method for making low leakage polycrystalline silicon-to-substrate contacts
JPS60227469A (ja) * 1984-04-26 1985-11-12 Nec Corp 半導体装置
JPS61174767A (ja) * 1985-01-30 1986-08-06 Nec Corp 半導体素子電極
JPH02291150A (ja) * 1989-04-28 1990-11-30 Hitachi Ltd 半導体装置
JP2805875B2 (ja) * 1989-08-10 1998-09-30 富士通株式会社 半導体装置の製造方法
US5034348A (en) * 1990-08-16 1991-07-23 International Business Machines Corp. Process for forming refractory metal silicide layers of different thicknesses in an integrated circuit
US5086017A (en) * 1991-03-21 1992-02-04 Industrial Technology Research Institute Self aligned silicide process for gate/runner without extra masking
JPH06261358A (ja) * 1993-03-09 1994-09-16 Sekisui Chem Co Ltd 電話交換機

Also Published As

Publication number Publication date
JPH06204163A (ja) 1994-07-22
EP0589159A3 (de) 1994-11-09
DE69322223D1 (de) 1999-01-07
EP0589159A2 (de) 1994-03-30
EP0589159B1 (de) 1998-11-25
US5236852A (en) 1993-08-17
KR940007993A (ko) 1994-04-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee