DE3886286T2 - Verbindungsverfahren für Halbleiteranordnung. - Google Patents

Verbindungsverfahren für Halbleiteranordnung.

Info

Publication number
DE3886286T2
DE3886286T2 DE88107375T DE3886286T DE3886286T2 DE 3886286 T2 DE3886286 T2 DE 3886286T2 DE 88107375 T DE88107375 T DE 88107375T DE 3886286 T DE3886286 T DE 3886286T DE 3886286 T2 DE3886286 T2 DE 3886286T2
Authority
DE
Germany
Prior art keywords
semiconductor device
connection method
connection
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE88107375T
Other languages
English (en)
Other versions
DE3886286D1 (de
Inventor
Yasuhito Nakagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of DE3886286D1 publication Critical patent/DE3886286D1/de
Application granted granted Critical
Publication of DE3886286T2 publication Critical patent/DE3886286T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76891Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by using superconducting materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53285Conductive materials containing superconducting materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/01Manufacture or treatment
    • H10N60/0268Manufacture or treatment of devices comprising copper oxide
    • H10N60/0661Processes performed after copper oxide formation, e.g. patterning
    • H10N60/0688Etching
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/01Manufacture or treatment
    • H10N60/0884Treatment of superconductor layers by irradiation, e.g. ion-beam, electron-beam, laser beam or X-rays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
DE88107375T 1987-07-15 1988-05-07 Verbindungsverfahren für Halbleiteranordnung. Expired - Fee Related DE3886286T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62176220A JPH079905B2 (ja) 1987-07-15 1987-07-15 半導体装置の配線方法

Publications (2)

Publication Number Publication Date
DE3886286D1 DE3886286D1 (de) 1994-01-27
DE3886286T2 true DE3886286T2 (de) 1994-03-31

Family

ID=16009726

Family Applications (1)

Application Number Title Priority Date Filing Date
DE88107375T Expired - Fee Related DE3886286T2 (de) 1987-07-15 1988-05-07 Verbindungsverfahren für Halbleiteranordnung.

Country Status (3)

Country Link
EP (1) EP0299163B1 (de)
JP (1) JPH079905B2 (de)
DE (1) DE3886286T2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950010206B1 (ko) * 1987-03-09 1995-09-11 가부시끼가이샤 한도다이 에네르기 겐꾸쇼 전자 장치 및 그 제조 방법
JPS63314850A (ja) * 1987-06-18 1988-12-22 Fujitsu Ltd 半導体装置
CN1017110B (zh) * 1987-08-13 1992-06-17 株式会社半导体能源研究所 一种超导器件
JP2553101B2 (ja) * 1987-09-04 1996-11-13 株式会社東芝 半導体装置
GB2215548B (en) * 1988-02-26 1991-10-23 Gen Electric Co Plc A method of fabricating superconducting electronic devices
CA2185936A1 (en) * 1990-10-31 1992-05-01 Hiroshi Inada Process for fabricating a superconducting circuit
DE4038894C1 (de) * 1990-12-06 1992-06-25 Dornier Gmbh, 7990 Friedrichshafen, De
CN115440879B (zh) * 2022-06-16 2023-04-25 合肥本源量子计算科技有限责任公司 超导硅片及其制备方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4507852A (en) * 1983-09-12 1985-04-02 Rockwell International Corporation Method for making a reliable ohmic contact between two layers of integrated circuit metallizations
JPH0648733B2 (ja) * 1984-01-25 1994-06-22 株式会社日立製作所 極低温用半導体装置
JP2855614B2 (ja) * 1987-03-30 1999-02-10 住友電気工業株式会社 超電導回路の形成方法
DE3854238T2 (de) * 1987-04-08 1996-03-21 Hitachi Ltd Verfahren zur Herstellung eines supraleitenden Elements.
JPS63276822A (ja) * 1987-05-06 1988-11-15 Furukawa Electric Co Ltd:The 超電導薄膜のパタ−ニング方法
EP0365533A1 (de) * 1987-06-12 1990-05-02 Siemens Aktiengesellschaft Verfahren zur herstellung von leiterbereichen aus einem oxidkeramischen supraleitermaterial hoher sprungtemperatur
JPS63314850A (ja) * 1987-06-18 1988-12-22 Fujitsu Ltd 半導体装置

Also Published As

Publication number Publication date
DE3886286D1 (de) 1994-01-27
JPS6420638A (en) 1989-01-24
EP0299163A2 (de) 1989-01-18
EP0299163B1 (de) 1993-12-15
JPH079905B2 (ja) 1995-02-01
EP0299163A3 (en) 1989-09-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee