DE69021298D1 - Gerät für supraleitende Verbindungen. - Google Patents

Gerät für supraleitende Verbindungen.

Info

Publication number
DE69021298D1
DE69021298D1 DE69021298T DE69021298T DE69021298D1 DE 69021298 D1 DE69021298 D1 DE 69021298D1 DE 69021298 T DE69021298 T DE 69021298T DE 69021298 T DE69021298 T DE 69021298T DE 69021298 D1 DE69021298 D1 DE 69021298D1
Authority
DE
Germany
Prior art keywords
superconducting connections
superconducting
connections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69021298T
Other languages
English (en)
Other versions
DE69021298T2 (de
Inventor
Bruce Edwin Briley
Mikiel Loyal Larson
John Montsma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
AT&T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AT&T Corp filed Critical AT&T Corp
Publication of DE69021298D1 publication Critical patent/DE69021298D1/de
Application granted granted Critical
Publication of DE69021298T2 publication Critical patent/DE69021298T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49888Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials the conductive materials containing superconducting material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Containers, Films, And Cooling For Superconductive Devices (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
DE69021298T 1989-08-31 1990-08-22 Gerät für supraleitende Verbindungen. Expired - Lifetime DE69021298T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US40239089A 1989-08-31 1989-08-31

Publications (2)

Publication Number Publication Date
DE69021298D1 true DE69021298D1 (de) 1995-09-07
DE69021298T2 DE69021298T2 (de) 1996-04-04

Family

ID=23591684

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69021298T Expired - Lifetime DE69021298T2 (de) 1989-08-31 1990-08-22 Gerät für supraleitende Verbindungen.

Country Status (4)

Country Link
US (1) US5057877A (de)
EP (1) EP0415644B1 (de)
JP (1) JPH0710005B2 (de)
DE (1) DE69021298T2 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0494832B1 (de) * 1991-01-10 1998-05-06 Fujitsu Limited Eine Signalverarbeitungseinrichtung und ein Verfahren zum Übertragen von Signalen
DE69309306T2 (de) * 1992-12-15 1997-09-04 Du Pont Elektrische Verbindungsstrukturen
US5593918A (en) * 1994-04-22 1997-01-14 Lsi Logic Corporation Techniques for forming superconductive lines
US5623160A (en) * 1995-09-14 1997-04-22 Liberkowski; Janusz B. Signal-routing or interconnect substrate, structure and apparatus
JP2993926B2 (ja) * 1998-01-14 1999-12-27 株式会社移動体通信先端技術研究所 超伝導回路の実装構造
US7871233B2 (en) * 2006-04-17 2011-01-18 Perkins Manufacturing Company Front load container lifter
US9765934B2 (en) * 2011-05-16 2017-09-19 The Board Of Trustees Of The University Of Illinois Thermally managed LED arrays assembled by printing
WO2013038493A1 (ja) * 2011-09-13 2013-03-21 トヨタ自動車株式会社 半導体モジュール
US9786633B2 (en) 2014-04-23 2017-10-10 Massachusetts Institute Of Technology Interconnect structures for fine pitch assembly of semiconductor structures and related techniques
WO2016073049A1 (en) 2014-08-11 2016-05-12 Massachusetts Institute Of Technology Semiconductor structures for assembly in multi-layer semiconductor devices including at least one semiconductor structure
US9881904B2 (en) 2014-11-05 2018-01-30 Massachusetts Institute Of Technology Multi-layer semiconductor devices fabricated using a combination of substrate and via structures and fabrication techniques
US10134972B2 (en) 2015-07-23 2018-11-20 Massachusetts Institute Of Technology Qubit and coupler circuit structures and coupling techniques
WO2017015432A1 (en) 2015-07-23 2017-01-26 Massachusetts Institute Of Technology Superconducting integrated circuit
US10242968B2 (en) 2015-11-05 2019-03-26 Massachusetts Institute Of Technology Interconnect structure and semiconductor structures for assembly of cryogenic electronic packages
US10121754B2 (en) 2015-11-05 2018-11-06 Massachusetts Institute Of Technology Interconnect structures and methods for fabricating interconnect structures
US10586909B2 (en) 2016-10-11 2020-03-10 Massachusetts Institute Of Technology Cryogenic electronic packages and assemblies

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54116894A (en) * 1978-03-03 1979-09-11 Nippon Telegr & Teleph Corp <Ntt> Superconduction circuit device
US4499655A (en) * 1981-03-18 1985-02-19 General Electric Company Method for making alignment-enhancing feed-through conductors for stackable silicon-on-sapphire
US4454522A (en) * 1981-11-05 1984-06-12 The Board Of Trustees Of The Leland Stanford Junior University Microbridge superconducting device having support with stepped parallel surfaces
JPS58223383A (ja) * 1982-06-21 1983-12-24 Nippon Telegr & Teleph Corp <Ntt> 超伝導素子実装用マイクロコネクタ
JPS5974690A (ja) * 1982-10-20 1984-04-27 Nippon Telegr & Teleph Corp <Ntt> 超伝導素子実装体
US4837609A (en) * 1987-09-09 1989-06-06 American Telephone And Telegraph Company, At&T Bell Laboratories Semiconductor devices having superconducting interconnects
JPH01133379A (ja) * 1987-11-18 1989-05-25 Matsushita Electric Ind Co Ltd 超伝導接続体装置
US4891686A (en) * 1988-04-08 1990-01-02 Directed Energy, Inc. Semiconductor packaging with ground plane conductor arrangement
JPS6457683A (en) * 1988-07-21 1989-03-03 Nippon Telegraph & Telephone Low temperature wiring board for mounting electronic circuit device chip
JP2681288B2 (ja) * 1988-11-02 1997-11-26 富士通株式会社 超伝導素子用パッケージ

Also Published As

Publication number Publication date
EP0415644A3 (en) 1991-07-03
EP0415644B1 (de) 1995-08-02
JPH0710005B2 (ja) 1995-02-01
EP0415644A2 (de) 1991-03-06
DE69021298T2 (de) 1996-04-04
JPH0391973A (ja) 1991-04-17
US5057877A (en) 1991-10-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition