DE69300782T2 - Schaltung mit einem doppelten Phasenregelkreis. - Google Patents

Schaltung mit einem doppelten Phasenregelkreis.

Info

Publication number
DE69300782T2
DE69300782T2 DE69300782T DE69300782T DE69300782T2 DE 69300782 T2 DE69300782 T2 DE 69300782T2 DE 69300782 T DE69300782 T DE 69300782T DE 69300782 T DE69300782 T DE 69300782T DE 69300782 T2 DE69300782 T2 DE 69300782T2
Authority
DE
Germany
Prior art keywords
vco
phase
signal
circuit
output signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69300782T
Other languages
German (de)
English (en)
Other versions
DE69300782D1 (de
Inventor
Hideo Imaizumi
Yoshiaki Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP4037759A external-priority patent/JP2810580B2/ja
Priority claimed from JP4169184A external-priority patent/JP2859037B2/ja
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Application granted granted Critical
Publication of DE69300782D1 publication Critical patent/DE69300782D1/de
Publication of DE69300782T2 publication Critical patent/DE69300782T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
    • H03L7/235—Nested phase locked loops
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00—Demodulation of amplitude-modulated oscillations
    • H03D1/22—Homodyne or synchrodyne circuits
    • H03D1/2281—Homodyne or synchrodyne circuits using a phase locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00—Demodulation of amplitude-modulated oscillations
    • H03D1/22—Homodyne or synchrodyne circuits
    • H03D1/2245—Homodyne or synchrodyne circuits using two quadrature channels
    • H03D1/2254—Homodyne or synchrodyne circuits using two quadrature channels and a phase locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
DE69300782T 1992-02-25 1993-02-16 Schaltung mit einem doppelten Phasenregelkreis. Expired - Fee Related DE69300782T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP4037759A JP2810580B2 (ja) 1992-02-25 1992-02-25 Ｐｌｌ検波回路
JP4169184A JP2859037B2 (ja) 1992-06-26 1992-06-26 ２重ｐｌｌ回路

Publications (2)

Publication Number Publication Date
DE69300782D1 DE69300782D1 (de) 1995-12-21
DE69300782T2 true DE69300782T2 (de) 1996-05-30

Family

ID=26376903

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69300782T Expired - Fee Related DE69300782T2 (de) 1992-02-25 1993-02-16 Schaltung mit einem doppelten Phasenregelkreis.

Country Status (4)

Country Link
US (1) US5329250A (OSRAM)
EP (1) EP0557867B1 (OSRAM)
KR (1) KR100208408B1 (OSRAM)
DE (1) DE69300782T2 (OSRAM)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2098973A1 (en) * 1993-06-22 1994-12-23 Enn Kaarsoo Electroic access control mail box system
JPH07235874A (ja) * 1994-02-24 1995-09-05 Sony Corp 発振器、それを用いたシンセサイザチューナ回路及びａｍ同期検波回路
DE4423215C1 (de) * 1994-07-01 1995-12-21 Siemens Ag Frequenzüberwachungsschaltung eines Taktgenerators
DE19521908B4 (de) * 1995-06-16 2005-11-10 Atmel Germany Gmbh Überlagerungsempfänger mit Synchrondemodulation für den Zeitzeichenempfang
US5737694A (en) * 1995-11-30 1998-04-07 Scientific-Atlanta, Inc. Highly stable frequency synthesizer loop with feedforward
US5943382A (en) * 1996-08-21 1999-08-24 Neomagic Corp. Dual-loop spread-spectrum clock generator with master PLL and slave voltage-modulation-locked loop
US6281727B1 (en) 2000-10-05 2001-08-28 Pericom Semiconductor Corp. Fine-tuning phase-locked loop PLL using variable resistor between dual PLL loops
US7574185B2 (en) * 2004-12-17 2009-08-11 Verigy (Singapore) Pte. Ltd. Method and apparatus for generating a phase-locked output signal
JP4365814B2 (ja) 2005-09-26 2009-11-18 株式会社東芝 受信機および無線通信装置
US9444470B2 (en) * 2014-01-31 2016-09-13 Microsemi Semiconductor Ulc Double phase-locked loop with frequency stabilization
BR112018075522B1 (pt) 2016-06-23 2022-10-11 Tetra Laval Holdings & Finance Sa Material para acondicionamento em folha, e, embalagem vedada

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5945273B2 (ja) * 1976-09-16 1984-11-05 ソニー株式会社 テレビジヨン受像機
DE2741351C2 (de) * 1977-09-14 1983-12-08 Wandel & Goltermann Gmbh & Co, 7412 Eningen Digital einstellbarer Frequenzerzeuger mit mehreren Oszillatoren
FR2439511A1 (fr) * 1978-10-16 1980-05-16 Licentia Gmbh Montage comprenant une boucle de regulation
NL8001903A (nl) * 1980-04-01 1981-11-02 Philips Nv Inrichting voor het versterken van een gemoduleerd draaggolfsignaal.
FR2565440B1 (fr) * 1984-06-01 1986-09-05 Adret Electronique Etage synthetiseur de frequence comportant deux boucles a verrouillage de phase dont la seconde multiplie la frequence de la premiere par un facteur voisin de l'unite.
US4839603A (en) * 1987-09-24 1989-06-13 Unisys Corporation Multiple-loop microwave frequency synthesizer using two phase lockloops
US5157355A (en) * 1988-09-13 1992-10-20 Canon Kabushiki Kaisha Phase-locked loop device having stability over wide frequency range
JPH0783259B2 (ja) * 1988-10-19 1995-09-06 ローム株式会社 Ｐｌｌ基準発振複合装置
JP2881791B2 (ja) * 1989-01-13 1999-04-12 ソニー株式会社 周波数シンセサイザ
JPH02244820A (ja) * 1989-03-16 1990-09-28 Oki Electric Ind Co Ltd Ｐｌｌ回路
US4912432A (en) * 1989-04-17 1990-03-27 Raytheon Company Plural feedback loop digital frequency synthesizer
US4943787A (en) * 1989-09-05 1990-07-24 Motorola, Inc. Digital time base generator with adjustable delay between two outputs
US4987386A (en) * 1989-10-03 1991-01-22 Communications Satellite Corporation Coherent phase and frequency recovery method and circuit
FI895068A0 (fi) * 1989-10-25 1989-10-25 Telenokia Oy Frekvenssyntetisator.
US4994762A (en) * 1989-11-20 1991-02-19 Motorola, Inc. Multiloop synthesizer with optimal spurious performance
JPH04313917A (ja) * 1991-03-29 1992-11-05 Mitsubishi Electric Corp ダブルｐｌｌ装置
JPH0537435A (ja) * 1991-07-31 1993-02-12 Nec Corp Ｔｄｍａ方式に用いる局部発振周波数シンセサイザ
US5105168A (en) * 1991-08-28 1992-04-14 Hewlett-Packard Company Vector locked loop
US5208555A (en) * 1991-09-23 1993-05-04 Triquint Semiconductor, Inc. Circuit for limiting maximum frequency output of a voltage controlled oscillator
US5235290A (en) * 1992-05-14 1993-08-10 Bar David Israel Method and apparatus for smoothing out phase fluctuations in a monitored signal

Also Published As

Publication number Publication date
KR100208408B1 (ko) 1999-07-15
KR930018947A (ko) 1993-09-22
DE69300782D1 (de) 1995-12-21
EP0557867A2 (en) 1993-09-01
US5329250A (en) 1994-07-12
EP0557867A3 (OSRAM) 1994-04-06
EP0557867B1 (en) 1995-11-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee