DE69225536T2 - Abschlussschaltung eines Reihen-Vorspannungsgenerators in einem ECL-Array - Google Patents

Abschlussschaltung eines Reihen-Vorspannungsgenerators in einem ECL-Array

Info

Publication number
DE69225536T2
DE69225536T2 DE69225536T DE69225536T DE69225536T2 DE 69225536 T2 DE69225536 T2 DE 69225536T2 DE 69225536 T DE69225536 T DE 69225536T DE 69225536 T DE69225536 T DE 69225536T DE 69225536 T2 DE69225536 T2 DE 69225536T2
Authority
DE
Germany
Prior art keywords
current
transistor
emitter follower
mirror
supply source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69225536T
Other languages
English (en)
Other versions
DE69225536D1 (de
Inventor
Barry J Robinson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE69225536D1 publication Critical patent/DE69225536D1/de
Application granted granted Critical
Publication of DE69225536T2 publication Critical patent/DE69225536T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/265—Current mirrors using bipolar transistors only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086—Emitter coupled logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computing Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Nonlinear Science (AREA)
  • Computer Hardware Design (AREA)
  • Electromagnetism (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Control Of Electrical Variables (AREA)
  • Amplifiers (AREA)
DE69225536T 1991-07-18 1992-07-06 Abschlussschaltung eines Reihen-Vorspannungsgenerators in einem ECL-Array Expired - Fee Related DE69225536T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/732,383 US5122686A (en) 1991-07-18 1991-07-18 Power reduction design for ECL outputs that is independent of random termination voltage

Publications (2)

Publication Number Publication Date
DE69225536D1 DE69225536D1 (de) 1998-06-25
DE69225536T2 true DE69225536T2 (de) 1999-01-07

Family

ID=24943315

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69225536T Expired - Fee Related DE69225536T2 (de) 1991-07-18 1992-07-06 Abschlussschaltung eines Reihen-Vorspannungsgenerators in einem ECL-Array

Country Status (5)

Country Link
US (1) US5122686A (de)
EP (1) EP0523893B1 (de)
JP (1) JPH05243970A (de)
AT (1) ATE166504T1 (de)
DE (1) DE69225536T2 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0798618B1 (de) * 1996-03-29 2002-02-20 Kabushiki Kaisha Toshiba Array-Anordnung mit Schaltkreisen und Konstantstromquellen für eine Vielzahl von Kanälen

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6065557A (ja) * 1983-09-21 1985-04-15 Fujitsu Ltd 集積回路装置
JPH0690656B2 (ja) * 1985-01-24 1994-11-14 ソニー株式会社 基準電圧の形成回路
JPH065493B2 (ja) * 1986-02-25 1994-01-19 株式会社東芝 定電流供給回路
DE3642167A1 (de) * 1986-12-10 1988-06-30 Philips Patentverwaltung Stromspiegelschaltung
JPS63302620A (ja) * 1987-06-03 1988-12-09 Toshiba Corp 出力回路
US4804861A (en) * 1988-02-11 1989-02-14 Motorola, Inc. Multifunction onboard input/output termination
JP2509696B2 (ja) * 1989-04-26 1996-06-26 株式会社東芝 ゲ―トアレ―半導体集積回路装置
JPH0666678B2 (ja) * 1989-11-30 1994-08-24 株式会社東芝 Ｅｃｌ回路
JPH0461419A (ja) * 1990-06-29 1992-02-27 Nec Corp Ｅｃｌ回路

Also Published As

Publication number Publication date
DE69225536D1 (de) 1998-06-25
JPH05243970A (ja) 1993-09-21
EP0523893A2 (de) 1993-01-20
US5122686A (en) 1992-06-16
EP0523893A3 (de) 1995-03-08
ATE166504T1 (de) 1998-06-15
EP0523893B1 (de) 1998-05-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee