DE69219961D1 - Statische Direktzugriffspeicheranordnung mit variablen Ladungsschaltungen für Bitleitungsparen - Google Patents

Statische Direktzugriffspeicheranordnung mit variablen Ladungsschaltungen für Bitleitungsparen

Info

Publication number
DE69219961D1
DE69219961D1 DE69219961T DE69219961T DE69219961D1 DE 69219961 D1 DE69219961 D1 DE 69219961D1 DE 69219961 T DE69219961 T DE 69219961T DE 69219961 T DE69219961 T DE 69219961T DE 69219961 D1 DE69219961 D1 DE 69219961D1
Authority
DE
Germany
Prior art keywords
random access
bit line
access memory
static random
memory arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69219961T
Other languages
English (en)
Other versions
DE69219961T2 (de
Inventor
Hiroyuki Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69219961D1 publication Critical patent/DE69219961D1/de
Publication of DE69219961T2 publication Critical patent/DE69219961T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419Read-write [R-W] circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
DE69219961T 1991-08-19 1992-08-18 Statische Direktzugriffspeichervorrichtung mit variablen Ladungsschaltungen fürBitleitungspaare Expired - Fee Related DE69219961T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3232305A JP3057836B2 (ja) 1991-08-19 1991-08-19 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69219961D1 true DE69219961D1 (de) 1997-07-03
DE69219961T2 DE69219961T2 (de) 1998-01-22

Family

ID=16937130

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69219961T Expired - Fee Related DE69219961T2 (de) 1991-08-19 1992-08-18 Statische Direktzugriffspeichervorrichtung mit variablen Ladungsschaltungen fürBitleitungspaare

Country Status (4)

Country Link
US (1) US5305264A (de)
EP (1) EP0528403B1 (de)
JP (1) JP3057836B2 (de)
DE (1) DE69219961T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950005577B1 (ko) * 1992-12-30 1995-05-25 현대전자산업주식회사 비트 라인 부하 회로
JP3129880B2 (ja) * 1993-06-18 2001-01-31 株式会社東芝 半導体記憶装置
US5420533A (en) * 1993-12-28 1995-05-30 Goldstar Electron Co., Ltd. Pull-down circuit for wide voltage operation
US5951702A (en) * 1997-04-04 1999-09-14 S3 Incorporated RAM-like test structure superimposed over rows of macrocells with added differential pass transistors in a CPU
US5991192A (en) * 1997-12-08 1999-11-23 National Science Council Of Republic Of China Current-mode write-circuit of a static ram
US9842631B2 (en) * 2012-12-14 2017-12-12 Nvidia Corporation Mitigating external influences on long signal lines

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0770222B2 (ja) * 1984-06-04 1995-07-31 株式会社日立製作所 Mosスタテイツク型ram
JPS639097A (ja) * 1986-06-30 1988-01-14 Sony Corp スタテイツクram
JPS6446288A (en) * 1987-08-13 1989-02-20 Toshiba Corp Semiconductor memory device
JP2654548B2 (ja) * 1987-10-02 1997-09-17 株式会社日立製作所 半導体記憶装置
JPH02183492A (ja) * 1989-01-09 1990-07-18 Matsushita Electric Ind Co Ltd メモリ回路
JP2701506B2 (ja) * 1990-02-08 1998-01-21 日本電気株式会社 半導体メモリ回路
JPH03278396A (ja) * 1990-03-27 1991-12-10 Nec Corp 半導体記憶装置

Also Published As

Publication number Publication date
DE69219961T2 (de) 1998-01-22
EP0528403B1 (de) 1997-05-28
US5305264A (en) 1994-04-19
EP0528403A3 (en) 1993-09-22
JP3057836B2 (ja) 2000-07-04
JPH05151782A (ja) 1993-06-18
EP0528403A2 (de) 1993-02-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee