DE69219298D1 - Reset-Gate für einen Phasendetektor in einer phasenverriegelten Schleife - Google Patents

Reset-Gate für einen Phasendetektor in einer phasenverriegelten Schleife

Info

Publication number
DE69219298D1
DE69219298D1 DE69219298T DE69219298T DE69219298D1 DE 69219298 D1 DE69219298 D1 DE 69219298D1 DE 69219298 T DE69219298 T DE 69219298T DE 69219298 T DE69219298 T DE 69219298T DE 69219298 D1 DE69219298 D1 DE 69219298D1
Authority
DE
Germany
Prior art keywords
phase
locked loop
reset gate
phase detector
phase locked
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69219298T
Other languages
English (en)
Other versions
DE69219298T2 (de
Inventor
Alan C Rogers
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of DE69219298D1 publication Critical patent/DE69219298D1/de
Application granted granted Critical
Publication of DE69219298T2 publication Critical patent/DE69219298T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09403—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using junction field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09448—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET in combination with bipolar transistors [BIMOS]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Logic Circuits (AREA)
DE69219298T 1991-12-19 1992-11-18 Reset-Gate für einen Phasendetektor in einer phasenverriegelten Schleife Expired - Fee Related DE69219298T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/810,683 US5191239A (en) 1991-12-19 1991-12-19 Reset gate for a phase detector in a phase-locked loop

Publications (2)

Publication Number Publication Date
DE69219298D1 true DE69219298D1 (de) 1997-05-28
DE69219298T2 DE69219298T2 (de) 1997-11-13

Family

ID=25204418

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69219298T Expired - Fee Related DE69219298T2 (de) 1991-12-19 1992-11-18 Reset-Gate für einen Phasendetektor in einer phasenverriegelten Schleife

Country Status (5)

Country Link
US (1) US5191239A (de)
EP (1) EP0547773B1 (de)
JP (1) JP2588819B2 (de)
KR (1) KR0134180B1 (de)
DE (1) DE69219298T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5574894A (en) * 1994-11-03 1996-11-12 Motorola, Inc. Integrated circuit data processor which provides external sensibility of internal signals during reset
US5596293A (en) * 1995-06-06 1997-01-21 Sun Microsystems, Inc. Noise resistant reset circuit for a phase detector in a phase-locked loop
KR19980042114A (ko) * 1996-11-11 1998-08-17 가나이 츠토무 위상록루프회로를 갖는 시스템
KR100253592B1 (ko) * 1997-06-30 2000-04-15 김영환 클럭동기 래치회로
US5977801A (en) * 1997-07-07 1999-11-02 International Business Machines Corporation Self-resetting phase/frequency detector with reduced dead zone
US6614289B1 (en) * 2000-11-07 2003-09-02 Lovoltech Inc. Starter device for normally off FETs
CA2295435C (en) 2000-01-06 2004-03-30 Thomas Riley Linear low noise phase locked loop frequency synthesizer using controlled divider pulse widths
SE0003058D0 (sv) * 2000-08-30 2000-08-30 Ericsson Telefon Ab L M A state machine
TW583837B (en) * 2003-05-06 2004-04-11 Realtek Semiconductor Corp Phase frequency detector applied in digital PLL system
US8866556B2 (en) * 2009-02-27 2014-10-21 Analog Bits, Inc. Phase shift phase locked loop
US7940088B1 (en) 2009-03-31 2011-05-10 Pmc-Sierra, Inc. High speed phase frequency detector
WO2012083086A1 (en) 2010-12-15 2012-06-21 Analog Bits, Inc. Encoder/decoder for balanced transmission of variables over few multi-variable channels

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH514962A (fr) * 1968-11-11 1971-10-31 Centre Electron Horloger Circuit diviseur de fréquence
DE3274039D1 (en) * 1981-02-25 1986-12-04 Toshiba Kk Complementary mosfet logic circuit
JPS60173924A (ja) * 1984-02-20 1985-09-07 Toshiba Corp 論理回路
US4649296A (en) * 1984-07-13 1987-03-10 At&T Bell Laboratories Synthetic CMOS static logic gates
JP2544343B2 (ja) * 1985-02-07 1996-10-16 株式会社日立製作所 半導体集積回路装置
US4645952A (en) * 1985-11-14 1987-02-24 Thomson Components-Mostek Corporation High speed NOR gate
JP2696991B2 (ja) * 1988-09-26 1998-01-14 日本電気株式会社 ＢｉＣＭＯＳ論理回路

Also Published As

Publication number Publication date
US5191239A (en) 1993-03-02
EP0547773A1 (de) 1993-06-23
KR0134180B1 (ko) 1998-04-29
JPH05284014A (ja) 1993-10-29
KR930015362A (ko) 1993-07-24
DE69219298T2 (de) 1997-11-13
EP0547773B1 (de) 1997-04-23
JP2588819B2 (ja) 1997-03-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee