DE69127141T2 - Speicherzellenschaltung und Betrieb - Google Patents
Speicherzellenschaltung und BetriebInfo
- Publication number
- DE69127141T2 DE69127141T2 DE69127141T DE69127141T DE69127141T2 DE 69127141 T2 DE69127141 T2 DE 69127141T2 DE 69127141 T DE69127141 T DE 69127141T DE 69127141 T DE69127141 T DE 69127141T DE 69127141 T2 DE69127141 T2 DE 69127141T2
- Authority
- DE
- Germany
- Prior art keywords
- memory cell
- cell circuit
- circuit
- memory
- cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/546,497 US5068825A (en) | 1990-06-29 | 1990-06-29 | Memory cell circuit and operation thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69127141D1 DE69127141D1 (de) | 1997-09-11 |
DE69127141T2 true DE69127141T2 (de) | 1998-02-05 |
Family
ID=24180701
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69127141T Expired - Fee Related DE69127141T2 (de) | 1990-06-29 | 1991-05-24 | Speicherzellenschaltung und Betrieb |
Country Status (5)
Country | Link |
---|---|
US (1) | US5068825A (de) |
EP (1) | EP0463374B1 (de) |
JP (1) | JP3235845B2 (de) |
KR (1) | KR100244425B1 (de) |
DE (1) | DE69127141T2 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2715759B1 (fr) * | 1994-01-31 | 1996-03-22 | Sgs Thomson Microelectronics | Bascule bistable non volatile programmable, avec réduction de parasites en mode de lecture, notamment pour circuit de redondance de mémoire. |
US5475633A (en) * | 1994-06-01 | 1995-12-12 | Intel Corporation | Cache memory utilizing pseudo static four transistor memory cell |
DE19503782A1 (de) * | 1995-02-04 | 1996-08-08 | Philips Patentverwaltung | Verzögerungsschaltung |
US5615160A (en) * | 1995-09-08 | 1997-03-25 | International Business Machines Corporation | Minimal recharge overhead circuit for domino SRAM structures |
US6442061B1 (en) * | 2001-02-14 | 2002-08-27 | Lsi Logic Corporation | Single channel four transistor SRAM |
US8896148B2 (en) * | 2010-06-22 | 2014-11-25 | Infineon Technologies Ag | Use of auxiliary currents for voltage regulation |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4209851A (en) * | 1978-07-19 | 1980-06-24 | Texas Instruments Incorporated | Semiconductor memory cell with clocked voltage supply from data lines |
US4349894A (en) * | 1978-07-19 | 1982-09-14 | Texas Instruments Incorporated | Semiconductor memory cell with synthesized load resistors |
US4334293A (en) * | 1978-07-19 | 1982-06-08 | Texas Instruments Incorporated | Semiconductor memory cell with clocked voltage supply from data lines |
US4236229A (en) * | 1978-07-19 | 1980-11-25 | Texas Instruments Incorporated | Semiconductor memory cell with synthesized load resistors |
US4184208A (en) * | 1978-07-19 | 1980-01-15 | Texas Instruments Incorporated | Pseudo-static semiconductor memory cell |
US4995001A (en) * | 1988-10-31 | 1991-02-19 | International Business Machines Corporation | Memory cell and read circuit |
-
1990
- 1990-06-29 US US07/546,497 patent/US5068825A/en not_active Expired - Fee Related
-
1991
- 1991-05-24 EP EP91108473A patent/EP0463374B1/de not_active Expired - Lifetime
- 1991-05-24 DE DE69127141T patent/DE69127141T2/de not_active Expired - Fee Related
- 1991-06-28 JP JP15872091A patent/JP3235845B2/ja not_active Expired - Fee Related
- 1991-06-28 KR KR1019910010933A patent/KR100244425B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JPH05135585A (ja) | 1993-06-01 |
KR920001546A (ko) | 1992-01-30 |
DE69127141D1 (de) | 1997-09-11 |
JP3235845B2 (ja) | 2001-12-04 |
KR100244425B1 (ko) | 2000-03-02 |
EP0463374A2 (de) | 1992-01-02 |
EP0463374A3 (en) | 1993-03-17 |
US5068825A (en) | 1991-11-26 |
EP0463374B1 (de) | 1997-08-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |