DE69124935D1 - Sequentielle logische Schaltung mit Zustandshalteschaltungen - Google Patents

Sequentielle logische Schaltung mit Zustandshalteschaltungen

Info

Publication number
DE69124935D1
DE69124935D1 DE69124935T DE69124935T DE69124935D1 DE 69124935 D1 DE69124935 D1 DE 69124935D1 DE 69124935 T DE69124935 T DE 69124935T DE 69124935 T DE69124935 T DE 69124935T DE 69124935 D1 DE69124935 D1 DE 69124935D1
Authority
DE
Germany
Prior art keywords
logic circuit
hold circuits
sequential logic
state hold
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69124935T
Other languages
English (en)
Other versions
DE69124935T2 (de
Inventor
Motomu Takatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE69124935D1 publication Critical patent/DE69124935D1/de
Application granted granted Critical
Publication of DE69124935T2 publication Critical patent/DE69124935T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/39—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using thyristors or the avalanche or negative resistance type, e.g. PNPN, SCR, SCS, UJT
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Logic Circuits (AREA)
DE69124935T 1990-11-28 1991-11-27 Sequentielle logische Schaltung mit Zustandshalteschaltungen Expired - Fee Related DE69124935T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2327078A JP2868613B2 (ja) 1990-11-28 1990-11-28 順序論理回路

Publications (2)

Publication Number Publication Date
DE69124935D1 true DE69124935D1 (de) 1997-04-10
DE69124935T2 DE69124935T2 (de) 1997-10-02

Family

ID=18195044

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69124935T Expired - Fee Related DE69124935T2 (de) 1990-11-28 1991-11-27 Sequentielle logische Schaltung mit Zustandshalteschaltungen

Country Status (4)

Country Link
US (1) US5221866A (de)
EP (1) EP0488259B1 (de)
JP (1) JP2868613B2 (de)
DE (1) DE69124935T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3372970B2 (ja) * 1992-09-02 2003-02-04 シャープ株式会社 自己同期型転送制御回路
US5388225A (en) * 1992-09-16 1995-02-07 Texas Instruments Incorporated Time-domain boundary bridge method and apparatus for asynchronous sequential machines
JPH0887462A (ja) * 1994-09-20 1996-04-02 Fujitsu Ltd ステートマシン及び通信制御方式
US5721503A (en) * 1994-10-26 1998-02-24 Hughes Aircraft Company Flash analog-to-digital converter with latching exclusive or gates
US6037801A (en) * 1997-10-27 2000-03-14 Intel Corporation Method and apparatus for clocking a sequential logic circuit
DE10308779B8 (de) * 2003-02-28 2012-07-05 Wieland-Werke Ag Bleifreie Kupferlegierung und deren Verwendung
US10338558B2 (en) 2014-10-17 2019-07-02 21, Inc. Sequential logic circuitry with reduced dynamic power consumption

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4939302B1 (de) * 1968-10-15 1974-10-24
US4348597A (en) * 1980-05-27 1982-09-07 Weber Harold J Latchup resistant pseudorandom binary sequence generator
EP0225698B1 (de) * 1985-10-12 1990-08-01 Fujitsu Limited Logische Schaltung
DE3626781A1 (de) * 1986-08-07 1988-02-11 Hell Gmbh & Co Kunststoffbesch Absaughaube zum entfernen von schwebstoffen aus einem behandlungsraum fuer bauteile
JP2688366B2 (ja) * 1989-03-20 1997-12-10 富士通株式会社 論理回路
JPH03117208A (ja) * 1989-09-29 1991-05-20 Nec Corp データ保持回路

Also Published As

Publication number Publication date
EP0488259A1 (de) 1992-06-03
EP0488259B1 (de) 1997-03-05
DE69124935T2 (de) 1997-10-02
JPH04196811A (ja) 1992-07-16
US5221866A (en) 1993-06-22
JP2868613B2 (ja) 1999-03-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU LTD., KAWASAKI, KANAGAWA, JP NEW ENERGY AN

8339 Ceased/non-payment of the annual fee