DE69114547D1 - Sequentielle Logikschaltungsvorrichtung. - Google Patents

Sequentielle Logikschaltungsvorrichtung.

Info

Publication number
DE69114547D1
DE69114547D1 DE69114547T DE69114547T DE69114547D1 DE 69114547 D1 DE69114547 D1 DE 69114547D1 DE 69114547 T DE69114547 T DE 69114547T DE 69114547 T DE69114547 T DE 69114547T DE 69114547 D1 DE69114547 D1 DE 69114547D1
Authority
DE
Germany
Prior art keywords
logic circuit
circuit device
sequential logic
sequential
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69114547T
Other languages
English (en)
Other versions
DE69114547T2 (de
Inventor
Noboru Okino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of DE69114547D1 publication Critical patent/DE69114547D1/de
Application granted granted Critical
Publication of DE69114547T2 publication Critical patent/DE69114547T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423—Input/output
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318541—Scan latches or cell details
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/284—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator monostable

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Electronic Switches (AREA)
DE69114547T 1990-03-09 1991-03-07 Sequentielle Logikschaltungsvorrichtung. Expired - Fee Related DE69114547T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2059646A JPH03260739A (ja) 1990-03-09 1990-03-09 順序動作型論理回路

Publications (2)

Publication Number Publication Date
DE69114547D1 true DE69114547D1 (de) 1995-12-21
DE69114547T2 DE69114547T2 (de) 1996-05-02

Family

ID=13119186

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69114547T Expired - Fee Related DE69114547T2 (de) 1990-03-09 1991-03-07 Sequentielle Logikschaltungsvorrichtung.

Country Status (5)

Country Link
US (1) US5140176A (de)
EP (1) EP0445826B1 (de)
JP (1) JPH03260739A (de)
KR (1) KR940003081B1 (de)
DE (1) DE69114547T2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05199080A (ja) * 1992-01-17 1993-08-06 Sony Corp 相補型論理回路
EP0600594B1 (de) * 1992-11-24 1998-03-04 Advanced Micro Devices, Inc. Abtastprüfung für integrierte Schaltungen
US5416362A (en) * 1993-09-10 1995-05-16 Unisys Corporation Transparent flip-flop
US7494816B2 (en) 1997-12-22 2009-02-24 Roche Diagnostic Operations, Inc. System and method for determining a temperature during analyte measurement
AU738325B2 (en) 1997-12-22 2001-09-13 Roche Diagnostics Operations Inc. Meter
IT1303240B1 (it) * 1998-08-07 2000-11-02 Ansaldo Segnalamento Ferroviario Spa Dispositivo e metodo di telecomando.
US8696880B2 (en) 2004-02-06 2014-04-15 Bayer Healthcare Llc Oxidizable species as an internal reference for biosensors and method of use
MX2008000836A (es) 2005-07-20 2008-03-26 Bayer Healthcare Llc Amperimetria regulada.
KR101477948B1 (ko) 2005-09-30 2014-12-30 바이엘 헬스케어 엘엘씨 게이트형 전압 전류 측정 분석 구간 결정 방법
CA2667295C (en) 2006-10-24 2018-02-20 Bayer Healthcare Llc Transient decay amperometry
WO2009076302A1 (en) 2007-12-10 2009-06-18 Bayer Healthcare Llc Control markers for auto-detection of control solution and methods of use

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51147937A (en) * 1975-06-14 1976-12-18 Fujitsu Ltd Logic circuit device
JPS5789154A (en) * 1980-11-25 1982-06-03 Nec Corp Logical integrated circuit
AU3230084A (en) * 1983-08-29 1985-03-07 Amdahl Corporation Serial chip scan
US4540903A (en) * 1983-10-17 1985-09-10 Storage Technology Partners Scannable asynchronous/synchronous CMOS latch
US4580066A (en) * 1984-03-22 1986-04-01 Sperry Corporation Fast scan/set testable latch using two levels of series gating with two current sources
JPS61260172A (ja) * 1985-05-15 1986-11-18 Mitsubishi Electric Corp 論理回路
US4970417A (en) * 1988-07-07 1990-11-13 Fujitsu Limited Emitter coupled logic latch circuit
US5003204A (en) * 1989-12-19 1991-03-26 Bull Hn Information Systems Inc. Edge triggered D-type flip-flop scan latch cell with recirculation capability

Also Published As

Publication number Publication date
KR940003081B1 (ko) 1994-04-13
EP0445826A2 (de) 1991-09-11
EP0445826A3 (en) 1991-10-23
EP0445826B1 (de) 1995-11-15
DE69114547T2 (de) 1996-05-02
JPH03260739A (ja) 1991-11-20
KR910017759A (ko) 1991-11-05
US5140176A (en) 1992-08-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee