DE69124289D1 - Monolithische Halbleiteranordnung und entsprechendes Herstellungsverfahren - Google Patents

Monolithische Halbleiteranordnung und entsprechendes Herstellungsverfahren

Info

Publication number
DE69124289D1
DE69124289D1 DE69124289T DE69124289T DE69124289D1 DE 69124289 D1 DE69124289 D1 DE 69124289D1 DE 69124289 T DE69124289 T DE 69124289T DE 69124289 T DE69124289 T DE 69124289T DE 69124289 D1 DE69124289 D1 DE 69124289D1
Authority
DE
Germany
Prior art keywords
semiconductor device
manufacturing process
corresponding manufacturing
monolithic semiconductor
monolithic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69124289T
Other languages
English (en)
Other versions
DE69124289T2 (de
Inventor
Raffaele Zambrano
Antonio Grimaldi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno
Original Assignee
CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno
SGS Thomson Microelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno, SGS Thomson Microelectronics SRL filed Critical CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno
Application granted granted Critical
Publication of DE69124289D1 publication Critical patent/DE69124289D1/de
Publication of DE69124289T2 publication Critical patent/DE69124289T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0623Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Element Separation (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
DE69124289T 1990-05-31 1991-05-25 Monolithische Halbleiteranordnung und entsprechendes Herstellungsverfahren Expired - Fee Related DE69124289T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT00661090A IT1244239B (it) 1990-05-31 1990-05-31 Terminazione dello stadio di potenza di un dispositivo monolitico a semicondutture e relativo processo di fabbricazione

Publications (2)

Publication Number Publication Date
DE69124289D1 true DE69124289D1 (de) 1997-03-06
DE69124289T2 DE69124289T2 (de) 1997-06-19

Family

ID=11121378

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69124289T Expired - Fee Related DE69124289T2 (de) 1990-05-31 1991-05-25 Monolithische Halbleiteranordnung und entsprechendes Herstellungsverfahren

Country Status (5)

Country Link
US (1) US5317182A (de)
EP (1) EP0459578B1 (de)
JP (1) JP3002016B2 (de)
DE (1) DE69124289T2 (de)
IT (1) IT1244239B (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0795597B2 (ja) * 1990-08-18 1995-10-11 三菱電機株式会社 サイリスタおよびその製造方法
DE69322963T2 (de) * 1993-09-17 1999-06-24 Cons Ric Microelettronica Eine integrierte Vorrichtung mit einem bipolaren Transistor und einem MOSFET Transistor in Emittorschaltungsanordnung
US5777362A (en) * 1995-06-07 1998-07-07 Harris Corporation High efficiency quasi-vertical DMOS in CMOS or BICMOS process
US5629543A (en) * 1995-08-21 1997-05-13 Siliconix Incorporated Trenched DMOS transistor with buried layer for reduced on-resistance and ruggedness
EP2261961B1 (de) * 1999-03-04 2019-07-17 Infineon Technologies AG Verfahren zur Herstellung einer vertikalen MOS-Transistoranordnung
JP5048242B2 (ja) * 2005-11-30 2012-10-17 オンセミコンダクター・トレーディング・リミテッド 半導体装置及びその製造方法
JP5739657B2 (ja) * 2010-12-24 2015-06-24 新電元工業株式会社 半導体装置の製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2480036A1 (fr) * 1980-04-04 1981-10-09 Thomson Csf Structure de dispositif a semi-conducteur a anneau de garde et a fonctionnement unipolaire
US4345265A (en) * 1980-04-14 1982-08-17 Supertex, Inc. MOS Power transistor with improved high-voltage capability
JPS57162359A (en) * 1981-03-30 1982-10-06 Toshiba Corp Semiconductor device
JPS58100460A (ja) * 1981-12-11 1983-06-15 Hitachi Ltd 縦形mos半導体装置
JPS63177566A (ja) * 1987-01-19 1988-07-21 Nec Corp 電界効果トランジスタ
JPS63198367A (ja) * 1987-02-13 1988-08-17 Toshiba Corp 半導体装置
DE3832750A1 (de) * 1988-09-27 1990-03-29 Asea Brown Boveri Leistungshalbleiterbauelement
IT1241050B (it) * 1990-04-20 1993-12-29 Cons Ric Microelettronica Processo di formazione di una regione sepolta di drain o di collettore in dispositivi monolitici a semiconduttore.

Also Published As

Publication number Publication date
EP0459578B1 (de) 1997-01-22
DE69124289T2 (de) 1997-06-19
IT9006610A0 (it) 1990-05-31
IT9006610A1 (it) 1991-12-01
EP0459578A2 (de) 1991-12-04
IT1244239B (it) 1994-07-08
EP0459578A3 (en) 1992-07-08
JPH0653510A (ja) 1994-02-25
JP3002016B2 (ja) 2000-01-24
US5317182A (en) 1994-05-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee