DE69032799D1 - Programmierbare logische Vorrichtung und zugehörige Speicherschaltung - Google Patents
Programmierbare logische Vorrichtung und zugehörige SpeicherschaltungInfo
- Publication number
- DE69032799D1 DE69032799D1 DE69032799T DE69032799T DE69032799D1 DE 69032799 D1 DE69032799 D1 DE 69032799D1 DE 69032799 T DE69032799 T DE 69032799T DE 69032799 T DE69032799 T DE 69032799T DE 69032799 D1 DE69032799 D1 DE 69032799D1
- Authority
- DE
- Germany
- Prior art keywords
- programmable logic
- logic device
- memory circuit
- associated memory
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17748—Structural details of configuration resources
- H03K19/1776—Structural details of configuration resources for memories
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
- H03K17/04106—Modifications for accelerating switching without feedback from the output circuit to the control circuit in field-effect transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17736—Structural details of routing resources
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/1778—Structural details for adapting physical parameters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
- H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
- H03K3/356147—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit using pass gates
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Logic Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1228833A JPH0654873B2 (ja) | 1989-09-04 | 1989-09-04 | プログラマブル型論理装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69032799D1 true DE69032799D1 (de) | 1999-01-14 |
DE69032799T2 DE69032799T2 (de) | 1999-05-20 |
Family
ID=16882574
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69032799T Expired - Fee Related DE69032799T2 (de) | 1989-09-04 | 1990-09-04 | Programmierbare logische Vorrichtung und zugehörige Speicherschaltung |
Country Status (5)
Country | Link |
---|---|
US (1) | US5214327A (de) |
EP (1) | EP0416546B1 (de) |
JP (1) | JPH0654873B2 (de) |
KR (1) | KR940007003B1 (de) |
DE (1) | DE69032799T2 (de) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR930001215A (ko) * | 1991-06-03 | 1993-01-16 | 프레데릭 얀 스미트 | 프로그램 가능한 셀을 포함하는 전자 회로 |
JP2672740B2 (ja) * | 1991-10-07 | 1997-11-05 | 三菱電機株式会社 | マイクロコンピュータ |
TW229341B (de) * | 1992-06-22 | 1994-09-01 | Advanced Micro Devices Inc | |
US5319261A (en) * | 1992-07-30 | 1994-06-07 | Aptix Corporation | Reprogrammable interconnect architecture using fewer storage cells than switches |
GB9303084D0 (en) * | 1993-02-16 | 1993-03-31 | Inmos Ltd | Programmable logic circuit |
US5612892A (en) * | 1993-12-16 | 1997-03-18 | Intel Corporation | Method and structure for improving power consumption on a component while maintaining high operating frequency |
WO1996042141A1 (en) * | 1995-06-09 | 1996-12-27 | Advanced Micro Devices, Inc. | Field programmable gate array (fpga) having an improved configuration memory and look up table |
US5760602A (en) * | 1996-01-17 | 1998-06-02 | Hewlett-Packard Company | Time multiplexing a plurality of configuration settings of a programmable switch element in a FPGA |
US5831896A (en) * | 1996-12-17 | 1998-11-03 | International Business Machines Corporation | Memory cell |
US6057704A (en) * | 1997-12-12 | 2000-05-02 | Xilinx, Inc. | Partially reconfigurable FPGA and method of operating same |
US6425077B1 (en) * | 1999-05-14 | 2002-07-23 | Xilinx, Inc. | System and method for reading data from a programmable logic device |
US6724647B1 (en) * | 2000-01-28 | 2004-04-20 | Renesas Technology Corporation | Variable logical circuit, semiconductor integrated circuit, and method for manufacturing semiconductor integrated circuit |
KR100560948B1 (ko) * | 2004-03-31 | 2006-03-14 | 매그나칩 반도체 유한회사 | 6 트랜지스터 듀얼 포트 에스램 셀 |
TWI306251B (en) * | 2004-06-18 | 2009-02-11 | Tian Holdings Llc | System of sampleing interface for pick-up head |
TWI303821B (en) * | 2004-06-30 | 2008-12-01 | Tian Holdings Llc | System and circuit for the sampling interface of pick-up head |
US7411853B2 (en) * | 2005-11-17 | 2008-08-12 | Altera Corporation | Volatile memory elements with elevated power supply levels for programmable logic device integrated circuits |
US7430148B2 (en) * | 2005-11-17 | 2008-09-30 | Altera Corporation | Volatile memory elements with boosted output voltages for programmable logic device integrated circuits |
US7957177B2 (en) * | 2008-06-05 | 2011-06-07 | Altera Corporation | Static random-access memory with boosted voltages |
US8081503B1 (en) | 2009-02-27 | 2011-12-20 | Altera Corporation | Volatile memory elements with minimized area and leakage current |
JP4857367B2 (ja) * | 2009-07-06 | 2012-01-18 | 株式会社沖データ | 駆動回路及び画像形成装置 |
WO2011089808A1 (en) | 2010-01-20 | 2011-07-28 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
US8669781B2 (en) * | 2011-05-31 | 2014-03-11 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
JP6156151B2 (ja) * | 2012-01-11 | 2017-07-05 | 日本電気株式会社 | 双方向バッファ及びその制御方法 |
KR102257058B1 (ko) * | 2013-06-21 | 2021-05-26 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
TW201513128A (zh) * | 2013-07-05 | 2015-04-01 | Semiconductor Energy Lab | 半導體裝置 |
US10199105B2 (en) * | 2016-05-12 | 2019-02-05 | Crossbar, Inc. | Non-volatile resistive memory configuration cell for field programmable gate array |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3813653A (en) * | 1972-12-18 | 1974-05-28 | Rolm Corp | Memory cell with reduced voltage supply while writing |
US4042841A (en) * | 1974-09-20 | 1977-08-16 | Rca Corporation | Selectively powered flip-flop |
US4063117A (en) * | 1977-01-07 | 1977-12-13 | National Semiconductor Corporation | Circuit for increasing the output current in MOS transistors |
JPS5564686A (en) * | 1978-11-08 | 1980-05-15 | Nec Corp | Memory unit |
JPS5619676A (en) * | 1979-07-26 | 1981-02-24 | Fujitsu Ltd | Semiconductor device |
US4511811A (en) * | 1982-02-08 | 1985-04-16 | Seeq Technology, Inc. | Charge pump for providing programming voltage to the word lines in a semiconductor memory array |
US4695740A (en) * | 1984-09-26 | 1987-09-22 | Xilinx, Inc. | Bidirectional buffer amplifier |
US4642487A (en) * | 1984-09-26 | 1987-02-10 | Xilinx, Inc. | Special interconnect for configurable logic array |
JPS61117794A (ja) * | 1984-11-13 | 1986-06-05 | Fujitsu Ltd | 不揮発性半導体記憶装置 |
US4706216A (en) * | 1985-02-27 | 1987-11-10 | Xilinx, Inc. | Configurable logic element |
US4694430A (en) * | 1985-03-21 | 1987-09-15 | Sprague Electric Company | Logic controlled switch to alternate voltage sources |
US4750155A (en) * | 1985-09-19 | 1988-06-07 | Xilinx, Incorporated | 5-Transistor memory cell which can be reliably read and written |
US4722075A (en) * | 1985-10-15 | 1988-01-26 | Texas Instruments Incorporated | Equalized biased array for PROMS and EPROMS |
JPS62188419A (ja) * | 1986-02-13 | 1987-08-18 | Matsushita Electronics Corp | Mos型半導体集積回路 |
JPH01126724A (ja) * | 1987-11-12 | 1989-05-18 | Kawasaki Steel Corp | プログラマブル集積回路 |
JP2541248B2 (ja) * | 1987-11-20 | 1996-10-09 | 三菱電機株式会社 | プログラマブル・ロジック・アレイ |
JPH01136415A (ja) * | 1987-11-24 | 1989-05-29 | Hitachi Ltd | プログラマブル論理回路 |
JPH01166399A (ja) * | 1987-12-23 | 1989-06-30 | Toshiba Corp | スタティック型ランダムアクセスメモリ |
IT1221251B (it) * | 1988-02-25 | 1990-06-27 | Sgs Thomson Microelectronics | Circuito mos per il pilotaggio di un carico dal lato alto della alimentazione |
US5021680A (en) * | 1989-07-31 | 1991-06-04 | Advanced Micro Devices, Inc. | Voltage supply circuit for programming circuits of programmable logic arrays |
US5027003A (en) * | 1989-12-29 | 1991-06-25 | Texas Instruments Incorporated | Read/write switching circuit |
-
1989
- 1989-09-04 JP JP1228833A patent/JPH0654873B2/ja not_active Expired - Lifetime
-
1990
- 1990-08-31 KR KR1019900013629A patent/KR940007003B1/ko not_active IP Right Cessation
- 1990-09-04 EP EP90116994A patent/EP0416546B1/de not_active Expired - Lifetime
- 1990-09-04 US US07/577,653 patent/US5214327A/en not_active Expired - Lifetime
- 1990-09-04 DE DE69032799T patent/DE69032799T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH0654873B2 (ja) | 1994-07-20 |
EP0416546A2 (de) | 1991-03-13 |
KR940007003B1 (ko) | 1994-08-03 |
EP0416546A3 (en) | 1991-08-14 |
US5214327A (en) | 1993-05-25 |
JPH0391319A (ja) | 1991-04-16 |
EP0416546B1 (de) | 1998-12-02 |
DE69032799T2 (de) | 1999-05-20 |
KR910007272A (ko) | 1991-04-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |