DE69018112D1 - Hochleistungsspeichersystem. - Google Patents

Hochleistungsspeichersystem.

Info

Publication number
DE69018112D1
DE69018112D1 DE69018112T DE69018112T DE69018112D1 DE 69018112 D1 DE69018112 D1 DE 69018112D1 DE 69018112 T DE69018112 T DE 69018112T DE 69018112 T DE69018112 T DE 69018112T DE 69018112 D1 DE69018112 D1 DE 69018112D1
Authority
DE
Germany
Prior art keywords
stored
memory
words
bank
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69018112T
Other languages
English (en)
Other versions
DE69018112T2 (de
Inventor
Charlotte Amy Burrer
Lawrence L Krantz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EMC Corp
Original Assignee
Data General Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Data General Corp filed Critical Data General Corp
Application granted granted Critical
Publication of DE69018112D1 publication Critical patent/DE69018112D1/de
Publication of DE69018112T2 publication Critical patent/DE69018112T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0607—Interleaved addressing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Dram (AREA)
DE69018112T 1989-02-24 1990-02-09 Hochleistungsspeichersystem. Expired - Fee Related DE69018112T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/315,394 US5172379A (en) 1989-02-24 1989-02-24 High performance memory system

Publications (2)

Publication Number Publication Date
DE69018112D1 true DE69018112D1 (de) 1995-05-04
DE69018112T2 DE69018112T2 (de) 1995-11-30

Family

ID=23224207

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69029479T Expired - Fee Related DE69029479T2 (de) 1989-02-24 1990-02-09 Hochleistungsspeichersystem
DE69018112T Expired - Fee Related DE69018112T2 (de) 1989-02-24 1990-02-09 Hochleistungsspeichersystem.

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE69029479T Expired - Fee Related DE69029479T2 (de) 1989-02-24 1990-02-09 Hochleistungsspeichersystem

Country Status (7)

Country Link
US (1) US5172379A (de)
EP (2) EP0384620B1 (de)
JP (1) JPH032943A (de)
AU (1) AU626051B2 (de)
BR (1) BR9000886A (de)
CA (1) CA2007742C (de)
DE (2) DE69029479T2 (de)

Families Citing this family (37)

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CA2019351A1 (en) * 1989-07-06 1991-01-06 Francis H. Reiff Fault tolerant memory
US5206865A (en) * 1990-12-17 1993-04-27 Motorola, Inc. Error detection and correction memory system
US5247644A (en) * 1991-02-06 1993-09-21 Advanced Micro Devices, Inc. Processing system with improved sequential memory accessing
JP2874375B2 (ja) * 1991-04-11 1999-03-24 日本電気株式会社 ダブルバッファ形エラスティック・ストア
US5289477A (en) * 1991-06-06 1994-02-22 International Business Machines Corp. Personal computer wherein ECC and partly error checking can be selectively chosen for memory elements installed in the system, memory elements enabling selective choice of error checking, and method
JP3299564B2 (ja) * 1992-05-11 2002-07-08 松下電器産業株式会社 メモリ装置
US5453998A (en) * 1993-04-26 1995-09-26 Unisys Corporation Circuit for processing data to/from an array of disks
US5537420A (en) * 1994-05-04 1996-07-16 General Instrument Corporation Of Delaware Convolutional interleaver with reduced memory requirements and address generator therefor
JP3102301B2 (ja) * 1995-05-24 2000-10-23 株式会社日立製作所 半導体記憶装置
US5748914A (en) * 1995-10-19 1998-05-05 Rambus, Inc. Protocol for communication with dynamic memory
US6470405B2 (en) 1995-10-19 2002-10-22 Rambus Inc. Protocol for communication with dynamic memory
JP2776335B2 (ja) * 1995-10-20 1998-07-16 日本電気株式会社 可変長シーケンシャル・レコードの書き込み方法
JP4084428B2 (ja) 1996-02-02 2008-04-30 富士通株式会社 半導体記憶装置
US5924117A (en) * 1996-12-16 1999-07-13 International Business Machines Corporation Multi-ported and interleaved cache memory supporting multiple simultaneous accesses thereto
US6266379B1 (en) 1997-06-20 2001-07-24 Massachusetts Institute Of Technology Digital transmitter with equalization
EP0927935A1 (de) * 1997-12-29 1999-07-07 BULL HN INFORMATION SYSTEMS ITALIA S.p.A. Speicherstruktur mit Speicherbankgruppen und Serialisierungsvorrichtung
US6237086B1 (en) 1998-04-22 2001-05-22 Sun Microsystems, Inc. 1 Method to prevent pipeline stalls in superscalar stack based computing systems
US6108768A (en) * 1998-04-22 2000-08-22 Sun Microsystems, Inc. Reissue logic for individually reissuing instructions trapped in a multiissue stack based computing system
US6170050B1 (en) 1998-04-22 2001-01-02 Sun Microsystems, Inc. Length decoder for variable length data
US6275903B1 (en) 1998-04-22 2001-08-14 Sun Microsystems, Inc. Stack cache miss handling
US6662333B1 (en) * 2000-02-04 2003-12-09 Hewlett-Packard Development Company, L.P. Shared error correction for memory design
US6701480B1 (en) * 2000-03-08 2004-03-02 Rockwell Automation Technologies, Inc. System and method for providing error check and correction in memory systems
JP2001352358A (ja) * 2000-06-07 2001-12-21 Nec Corp モデム用集積回路
US7356673B2 (en) * 2001-04-30 2008-04-08 International Business Machines Corporation System and method including distributed instruction buffers for storing frequently executed instructions in predecoded form
US6691276B2 (en) * 2001-06-25 2004-02-10 Intel Corporation Method for detecting and correcting failures in a memory system
US20030046501A1 (en) * 2001-09-04 2003-03-06 Schulz Jurgen M. Method for interleaving memory
US7117421B1 (en) * 2002-05-31 2006-10-03 Nvidia Corporation Transparent error correction code memory system and method
US8386797B1 (en) * 2002-08-07 2013-02-26 Nvidia Corporation System and method for transparent disk encryption
US20040064662A1 (en) * 2002-09-26 2004-04-01 Analog Devices, Inc. Methods and apparatus for bus control in digital signal processors
US7451380B2 (en) * 2005-03-03 2008-11-11 International Business Machines Corporation Method for implementing enhanced vertical ECC storage in a dynamic random access memory
JP2007183816A (ja) * 2006-01-06 2007-07-19 Elpida Memory Inc メモリ制御装置
US7836380B2 (en) * 2006-10-31 2010-11-16 Intel Corporation Destination indication to aid in posted write buffer loading
CN102483710A (zh) * 2009-08-25 2012-05-30 惠普发展公司，有限责任合伙企业 纠错
US11221764B2 (en) * 2010-01-29 2022-01-11 Mosys, Inc. Partitioned memory with shared memory resources and configurable functions
US9600189B2 (en) * 2014-06-11 2017-03-21 International Business Machines Corporation Bank-level fault management in a memory system
US9703630B2 (en) 2015-06-08 2017-07-11 International Business Machines Corporation Selective error coding
KR102451156B1 (ko) 2015-12-09 2022-10-06 삼성전자주식회사 메모리 모듈 내에서 랭크 인터리빙 동작을 갖는 반도체 메모리 장치

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3931613A (en) * 1974-09-25 1976-01-06 Data General Corporation Data processing system
NL7804674A (nl) * 1978-05-02 1979-11-06 Philips Nv Geheugen met detektie en korrektie van fouten.
US4323965A (en) * 1980-01-08 1982-04-06 Honeywell Information Systems Inc. Sequential chip select decode apparatus and method
JPS578980A (en) * 1980-06-18 1982-01-18 Hitachi Ltd Memory device
JPS5774898A (en) * 1980-10-28 1982-05-11 Nec Corp Main storage device
JPS6074068A (ja) * 1983-09-30 1985-04-26 Fujitsu Ltd 記憶装置
NL8400629A (nl) * 1984-02-29 1985-09-16 Philips Nv Snelle decodeur voor reed-solomon-codes, welke mede als encodeur te gebruiken is, alsmede opname/reproduktie-apparaat voorzien van zo een encodeur/decodeur.
JPS61198344A (ja) * 1985-02-28 1986-09-02 Nec Corp ブロツクデ−タ書込方式
JP2569478B2 (ja) * 1986-02-19 1997-01-08 ソニー株式会社 デ−タ記録装置
US4715036A (en) * 1986-05-16 1987-12-22 Digital Equipment Corporation Data encoder system
EP0261751A3 (de) * 1986-09-25 1990-07-18 Tektronix, Inc. Simultanes Speicherzugriffssystem
US4775978A (en) * 1987-01-12 1988-10-04 Magnetic Peripherals Inc. Data error correction system
US4802170A (en) * 1987-04-29 1989-01-31 Matrox Electronics Systems Limited Error disbursing format for digital information and method for organizing same

Also Published As

Publication number Publication date
CA2007742A1 (en) 1990-08-24
EP0622737A3 (de) 1995-08-02
JPH032943A (ja) 1991-01-09
AU626051B2 (en) 1992-07-23
AU4798290A (en) 1990-08-30
DE69029479T2 (de) 1997-07-10
EP0622737B1 (de) 1996-12-18
BR9000886A (pt) 1991-02-13
EP0622737A2 (de) 1994-11-02
EP0384620A3 (de) 1991-09-25
DE69029479D1 (de) 1997-01-30
US5172379A (en) 1992-12-15
CA2007742C (en) 1995-11-21
DE69018112T2 (de) 1995-11-30
EP0384620B1 (de) 1995-03-29
EP0384620A2 (de) 1990-08-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee