DE69007409T2 - Leiterplatte aus Aluminiumnitrid. - Google Patents

Leiterplatte aus Aluminiumnitrid.

Info

Publication number
DE69007409T2
DE69007409T2 DE69007409T DE69007409T DE69007409T2 DE 69007409 T2 DE69007409 T2 DE 69007409T2 DE 69007409 T DE69007409 T DE 69007409T DE 69007409 T DE69007409 T DE 69007409T DE 69007409 T2 DE69007409 T2 DE 69007409T2
Authority
DE
Germany
Prior art keywords
aluminum nitride
pcb made
pcb
nitride
aluminum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69007409T
Other languages
English (en)
Other versions
DE69007409D1 (de
Inventor
Kiyoshi Iyogi
Takaaki Yasumoto
Toshirou Yanazawa
Nobuo Iwase
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP24245190A external-priority patent/JP2831827B2/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69007409D1 publication Critical patent/DE69007409D1/de
Publication of DE69007409T2 publication Critical patent/DE69007409T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/009After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone characterised by the material treated
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/45Coating or impregnating, e.g. injection in masonry, partial coating of green or fired ceramics, organic coating compositions for adhering together two concrete elements
    • C04B41/52Multiple coating or impregnating multiple coating or impregnating with the same composition or with compositions only differing in the concentration of the constituents, is classified as single coating or impregnation
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/80After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone of only ceramics
    • C04B41/81Coating or impregnation
    • C04B41/89Coating or impregnation for obtaining at least two superposed coatings having different compositions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15Ceramic or glass substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Structural Engineering (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
DE69007409T 1989-09-27 1990-09-27 Leiterplatte aus Aluminiumnitrid. Expired - Lifetime DE69007409T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP24908089 1989-09-27
JP24245190A JP2831827B2 (ja) 1989-09-27 1990-09-14 回路基板

Publications (2)

Publication Number Publication Date
DE69007409D1 DE69007409D1 (de) 1994-04-21
DE69007409T2 true DE69007409T2 (de) 1994-07-28

Family

ID=26535758

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69007409T Expired - Lifetime DE69007409T2 (de) 1989-09-27 1990-09-27 Leiterplatte aus Aluminiumnitrid.

Country Status (3)

Country Link
US (1) US5041700A (de)
EP (1) EP0421680B1 (de)
DE (1) DE69007409T2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0494585A (ja) * 1990-08-10 1992-03-26 Cmk Corp プリント配線板
US5500301A (en) * 1991-03-07 1996-03-19 Kabushiki Kaisha Kobe Seiko Sho A1 alloy films and melting A1 alloy sputtering targets for depositing A1 alloy films
US5155661A (en) * 1991-05-15 1992-10-13 Hewlett-Packard Company Aluminum nitride multi-chip module
US5221639A (en) * 1991-10-20 1993-06-22 Motorola, Inc. Method of fabricating resistive conductive patterns on aluminum nitride substrates
JPH05218229A (ja) * 1992-01-28 1993-08-27 Toshiba Corp セラミック回路基板
US5315069A (en) * 1992-10-02 1994-05-24 Compaq Computer Corp. Electromagnetic radiation reduction technique using grounded conductive traces circumscribing internal planes of printed circuit boards
JP3314616B2 (ja) * 1995-10-05 2002-08-12 株式会社デンソー 大出力用半導体レーザ素子
US6586683B2 (en) 2001-04-27 2003-07-01 International Business Machines Corporation Printed circuit board with mixed metallurgy pads and method of fabrication
US7476289B2 (en) * 2006-06-29 2009-01-13 Applied Materials, Inc. Vacuum elastomer bonding apparatus and method
US8023269B2 (en) * 2008-08-15 2011-09-20 Siemens Energy, Inc. Wireless telemetry electronic circuit board for high temperature environments
CN101692441B (zh) * 2009-04-16 2012-04-11 旭丽电子(广州)有限公司 一种印刷电路板封装结构
JP6870767B2 (ja) * 2019-09-02 2021-05-12 三菱マテリアル株式会社 銅/セラミックス接合体、及び、絶縁回路基板
CN112851406B (zh) * 2021-01-21 2022-07-15 清华大学 一种在氮化铝陶瓷表面敷镍或敷镍合金的方法
CN113161297B (zh) * 2021-03-08 2022-07-22 潮州三环(集团)股份有限公司 一种陶瓷封装基座

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3587481T2 (de) * 1984-02-27 1993-12-16 Toshiba Kawasaki Kk Schaltungssubstrat mit hoher Wärmeleitfähigkeit.
US4695517A (en) * 1985-05-31 1987-09-22 Ngk Spark Plug Co., Ltd. Composite layer aluminum nitride base sintered body
JPS62197379A (ja) * 1986-02-20 1987-09-01 株式会社東芝 窒化アルミニウム基板
US4770953A (en) * 1986-02-20 1988-09-13 Kabushiki Kaisha Toshiba Aluminum nitride sintered body having conductive metallized layer
JPS62207789A (ja) * 1986-03-08 1987-09-12 日本特殊陶業株式会社 窒化アルミニウム製基材の表面構造及びその製造法
US4906511A (en) * 1987-02-12 1990-03-06 Kabushiki Kaisha Toshiba Aluminum nitride circuit board
JP2544398B2 (ja) * 1987-08-27 1996-10-16 富士通株式会社 A1nセラミックスのメタライズ方法
DE68922118T2 (de) * 1988-01-25 1995-10-12 Toshiba Kawasaki Kk Schaltungsplatte.
US4908348A (en) * 1988-02-08 1990-03-13 Eastman Kodak Company Barrier layer arrangement for conductive layers on silicon substrates

Also Published As

Publication number Publication date
EP0421680A1 (de) 1991-04-10
US5041700A (en) 1991-08-20
EP0421680B1 (de) 1994-03-16
DE69007409D1 (de) 1994-04-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)