DE68922240D1 - Komplementärausgangsschaltung für eine logische Schaltung. - Google Patents

Komplementärausgangsschaltung für eine logische Schaltung.

Info

Publication number
DE68922240D1
DE68922240D1 DE68922240T DE68922240T DE68922240D1 DE 68922240 D1 DE68922240 D1 DE 68922240D1 DE 68922240 T DE68922240 T DE 68922240T DE 68922240 T DE68922240 T DE 68922240T DE 68922240 D1 DE68922240 D1 DE 68922240D1
Authority
DE
Germany
Prior art keywords
circuit
complementary output
output circuit
logic circuit
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE68922240T
Other languages
English (en)
Other versions
DE68922240T2 (de
Inventor
Yasushi Aoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE68922240D1 publication Critical patent/DE68922240D1/de
Publication of DE68922240T2 publication Critical patent/DE68922240T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
    • H03K19/215—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical using field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
DE68922240T 1988-05-13 1989-05-12 Komplementärausgangsschaltung für eine logische Schaltung. Expired - Lifetime DE68922240T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63116583A JPH0716158B2 (ja) 1988-05-13 1988-05-13 出力回路およびそれを用いた論理回路

Publications (2)

Publication Number Publication Date
DE68922240D1 true DE68922240D1 (de) 1995-05-24
DE68922240T2 DE68922240T2 (de) 1995-12-07

Family

ID=14690723

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68922240T Expired - Lifetime DE68922240T2 (de) 1988-05-13 1989-05-12 Komplementärausgangsschaltung für eine logische Schaltung.

Country Status (4)

Country Link
US (1) US5013937A (de)
EP (1) EP0341740B1 (de)
JP (1) JPH0716158B2 (de)
DE (1) DE68922240T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5264744A (en) * 1989-11-21 1993-11-23 Hitachi, Ltd. Complementary signal transmission circuit with impedance matching circuitry
JP2902016B2 (ja) * 1989-11-21 1999-06-07 株式会社日立製作所 信号伝送方法および回路
US5023480A (en) * 1990-01-04 1991-06-11 Digital Equipment Corporation Push-pull cascode logic
KR950004745B1 (ko) * 1990-01-23 1995-05-06 니뽄 덴끼 가부시끼가이샤 반도체 디지탈 회로
US5111076A (en) * 1990-09-05 1992-05-05 Min Ming Tarng Digital superbuffer
JP3094469B2 (ja) * 1991-01-18 2000-10-03 ソニー株式会社 出力バッファ回路
JP2752839B2 (ja) * 1992-04-14 1998-05-18 シャープ株式会社 複合論理回路
JPH0613886A (ja) * 1992-06-29 1994-01-21 Mitsubishi Electric Corp 半導体集積回路
JP3151329B2 (ja) * 1993-04-07 2001-04-03 株式会社東芝 データ出力回路
US5483179A (en) * 1994-04-20 1996-01-09 International Business Machines Corporation Data output drivers with pull-up devices
US5736887A (en) * 1996-01-25 1998-04-07 Rockwell International Corporation Five volt tolerant protection circuit
US6087854A (en) * 1998-09-02 2000-07-11 Lattice Semiconductor Corporation High speed line driver with direct and complementary outputs
TW465190B (en) * 1998-11-26 2001-11-21 Ibm Circuit and method for implementing combinatorial logic functions
JP2001053598A (ja) * 1999-08-16 2001-02-23 Nec Corp インターフェイス回路、該インターフェイス回路を備えた電子機器及び通信システム
JP4412507B2 (ja) * 2007-10-03 2010-02-10 Ｎｅｃエレクトロニクス株式会社 半導体回路
JP5949213B2 (ja) * 2012-06-28 2016-07-06 セイコーエプソン株式会社 シフトレジスター回路、電気光学装置、及び電子機器
CN110601687B (zh) * 2019-09-16 2023-09-22 深圳青铜剑技术有限公司 一种驱动保护电路及其保护方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
UST952012I4 (de) * 1976-01-20 1976-11-02
US4486670A (en) * 1982-01-19 1984-12-04 Intersil, Inc. Monolithic CMOS low power digital level shifter
JPH0738583B2 (ja) * 1985-01-26 1995-04-26 株式会社東芝 半導体集積回路
US4709162A (en) * 1986-09-18 1987-11-24 International Business Machines Corporation Off-chip driver circuits
US4782250A (en) * 1987-08-31 1988-11-01 International Business Machines Corporation CMOS off-chip driver circuits

Also Published As

Publication number Publication date
DE68922240T2 (de) 1995-12-07
JPH0716158B2 (ja) 1995-02-22
US5013937A (en) 1991-05-07
EP0341740B1 (de) 1995-04-19
EP0341740A3 (en) 1990-06-27
EP0341740A2 (de) 1989-11-15
JPH01286618A (ja) 1989-11-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP