IT1213344B - Architettura di calcolatore a tolleranza di guasto. - Google Patents
Architettura di calcolatore a tolleranza di guasto.Info
- Publication number
- IT1213344B IT1213344B IT8621727A IT2172786A IT1213344B IT 1213344 B IT1213344 B IT 1213344B IT 8621727 A IT8621727 A IT 8621727A IT 2172786 A IT2172786 A IT 2172786A IT 1213344 B IT1213344 B IT 1213344B
- Authority
- IT
- Italy
- Prior art keywords
- fault tolerance
- tolerance calculator
- architecture
- calculator architecture
- fault
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/1633—Error detection by comparing the output of redundant processing systems using mutual exchange of the output between the redundant processing components
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/165—Error detection by comparing the output of redundant processing systems with continued operation after detection of the error
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2215—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test error correction or detection circuits
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Hardware Redundancy (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8621727A IT1213344B (it) | 1986-09-17 | 1986-09-17 | Architettura di calcolatore a tolleranza di guasto. |
US07/093,429 US4849979A (en) | 1986-09-17 | 1987-09-04 | Fault tolerant computer architecture |
EP87113151A EP0260584B1 (en) | 1986-09-17 | 1987-09-09 | Fault tolerant computer achitecture |
DE87113151T DE3786862T2 (de) | 1986-09-17 | 1987-09-09 | Fehlertolerante Rechnerarchitektur. |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8621727A IT1213344B (it) | 1986-09-17 | 1986-09-17 | Architettura di calcolatore a tolleranza di guasto. |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8621727A0 IT8621727A0 (it) | 1986-09-17 |
IT1213344B true IT1213344B (it) | 1989-12-20 |
Family
ID=11186014
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT8621727A IT1213344B (it) | 1986-09-17 | 1986-09-17 | Architettura di calcolatore a tolleranza di guasto. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4849979A (it) |
EP (1) | EP0260584B1 (it) |
DE (1) | DE3786862T2 (it) |
IT (1) | IT1213344B (it) |
Families Citing this family (36)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2003338A1 (en) * | 1987-11-09 | 1990-06-09 | Richard W. Cutts, Jr. | Synchronization of fault-tolerant computer system having multiple processors |
AU616213B2 (en) * | 1987-11-09 | 1991-10-24 | Tandem Computers Incorporated | Method and apparatus for synchronizing a plurality of processors |
JPH0721769B2 (ja) * | 1988-08-12 | 1995-03-08 | 日本電気株式会社 | マイクロプロセッサの冗長構成による機能監視方式 |
JPH0814797B2 (ja) * | 1988-11-14 | 1996-02-14 | 日本電気株式会社 | 二重化処理装置におけるチェック方法 |
US4965717A (en) * | 1988-12-09 | 1990-10-23 | Tandem Computers Incorporated | Multiple processor system having shared memory with private-write capability |
AU625293B2 (en) * | 1988-12-09 | 1992-07-09 | Tandem Computers Incorporated | Synchronization of fault-tolerant computer system having multiple processors |
JPH0314033A (ja) * | 1989-06-12 | 1991-01-22 | Fujitsu Ltd | マイクロプロセッサ比較チェック機能の検査方式 |
US5295258A (en) * | 1989-12-22 | 1994-03-15 | Tandem Computers Incorporated | Fault-tolerant computer system with online recovery and reintegration of redundant components |
US5203004A (en) * | 1990-01-08 | 1993-04-13 | Tandem Computers Incorporated | Multi-board system having electronic keying and preventing power to improperly connected plug-in board with improperly configured diode connections |
US5168499A (en) * | 1990-05-02 | 1992-12-01 | California Institute Of Technology | Fault detection and bypass in a sequence information signal processor |
US5157780A (en) * | 1990-06-12 | 1992-10-20 | Advanced Micro Devices, Inc. | Master-slave checking system |
US5251321A (en) * | 1990-06-20 | 1993-10-05 | Bull Hn Information Systems Inc. | Binary to binary coded decimal and binary coded decimal to binary conversion in a VLSI central processing unit |
US5195101A (en) * | 1990-06-28 | 1993-03-16 | Bull Hn Information Systems Inc. | Efficient error detection in a vlsi central processing unit |
US5263034A (en) * | 1990-10-09 | 1993-11-16 | Bull Information Systems Inc. | Error detection in the basic processing unit of a VLSI central processor |
US6247144B1 (en) * | 1991-01-31 | 2001-06-12 | Compaq Computer Corporation | Method and apparatus for comparing real time operation of object code compatible processors |
US5434997A (en) * | 1992-10-02 | 1995-07-18 | Compaq Computer Corp. | Method and apparatus for testing and debugging a tightly coupled mirrored processing system |
US5422837A (en) * | 1993-12-14 | 1995-06-06 | Bull Hn Information Systems Inc. | Apparatus for detecting differences between double precision results produced by dual processing units operating in parallel |
US20030088611A1 (en) * | 1994-01-19 | 2003-05-08 | Mti Technology Corporation | Systems and methods for dynamic alignment of associated portions of a code word from a plurality of asynchronous sources |
US5515529A (en) * | 1994-03-25 | 1996-05-07 | Bull Hn Information Syst | Central processor with duplicate basic processing units employing multiplexed data signals to reduce inter-unit conductor count |
JP2679674B2 (ja) * | 1994-05-02 | 1997-11-19 | 日本電気株式会社 | 半導体製造ライン制御装置 |
US5864654A (en) * | 1995-03-31 | 1999-01-26 | Nec Electronics, Inc. | Systems and methods for fault tolerant information processing |
JPH0973738A (ja) * | 1995-06-30 | 1997-03-18 | Sony Corp | 記録装置 |
US5892897A (en) * | 1997-02-05 | 1999-04-06 | Motorola, Inc. | Method and apparatus for microprocessor debugging |
US6161202A (en) * | 1997-02-18 | 2000-12-12 | Ee-Signals Gmbh & Co. Kg | Method for the monitoring of integrated circuits |
US6216051B1 (en) | 1998-05-04 | 2001-04-10 | Nec Electronics, Inc. | Manufacturing backup system |
US6601126B1 (en) * | 2000-01-20 | 2003-07-29 | Palmchip Corporation | Chip-core framework for systems-on-a-chip |
US6747828B2 (en) | 2001-02-22 | 2004-06-08 | Samsung Electronics Co., Ltd. | Apparatus and method for detecting an abnormality in a recorded signal |
DE10146695B4 (de) * | 2001-09-21 | 2015-11-05 | Bayerische Motoren Werke Aktiengesellschaft | Verfahren zur Übertragung von Nachrichten zwischen Busteilnehmern |
US7003691B2 (en) * | 2002-06-28 | 2006-02-21 | Hewlett-Packard Development Company, L.P. | Method and apparatus for seeding differences in lock-stepped processors |
US7213170B2 (en) | 2003-09-10 | 2007-05-01 | Hewlett-Packard Development Company, L.P. | Opportunistic CPU functional testing with hardware compare |
US7287184B2 (en) * | 2003-09-16 | 2007-10-23 | Rockwell Automation Technologies, Inc. | High speed synchronization in dual-processor safety controller |
DE102005054587A1 (de) * | 2005-11-16 | 2007-05-24 | Robert Bosch Gmbh | Programmgesteuerte Einheit und Verfahren zum Betreiben derselbigen |
US8243614B2 (en) * | 2008-03-07 | 2012-08-14 | Honeywell International Inc. | Hardware efficient monitoring of input/output signals |
US9607715B1 (en) | 2016-06-03 | 2017-03-28 | Apple Inc. | Memory internal comparator testing system |
GB2555628B (en) * | 2016-11-04 | 2019-02-20 | Advanced Risc Mach Ltd | Main processor error detection using checker processors |
US10559351B2 (en) * | 2017-02-20 | 2020-02-11 | Texas Instruments Incorporated | Methods and apparatus for reduced area control register circuit |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1965314C3 (de) * | 1969-12-29 | 1974-10-17 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zum Betrieb einer Datenverarbeitungsanordnung mit zwei Datenverarbeitungsanlagen |
US3678467A (en) * | 1970-10-20 | 1972-07-18 | Bell Telephone Labor Inc | Multiprocessor with cooperative program execution |
US4099234A (en) * | 1976-11-15 | 1978-07-04 | Honeywell Information Systems Inc. | Input/output processing system utilizing locked processors |
US4096989A (en) * | 1977-06-20 | 1978-06-27 | The Bendix Corporation | Monitoring apparatus for redundant control systems |
DE2729362C2 (de) * | 1977-06-29 | 1982-07-08 | Siemens AG, 1000 Berlin und 8000 München | Digitale Datenverarbeitungsanordnung, insbesondere für die Eisenbahnsicherungstechnik, mit in zwei Kanälen dieselben Informationen verarbeitenden Schaltwerken |
US4233682A (en) * | 1978-06-15 | 1980-11-11 | Sperry Corporation | Fault detection and isolation system |
DE3003291C2 (de) * | 1980-01-30 | 1983-02-24 | Siemens AG, 1000 Berlin und 8000 München | Zweikanalige Datenverarbeitungsanordnung für Eisenbahnsicherungszwecke |
US4412282A (en) * | 1980-12-29 | 1983-10-25 | Gte Automatic Electric Labs Inc. | Microprocessor control circuit |
US4541094A (en) * | 1983-03-21 | 1985-09-10 | Sequoia Systems, Inc. | Self-checking computer circuitry |
-
1986
- 1986-09-17 IT IT8621727A patent/IT1213344B/it active
-
1987
- 1987-09-04 US US07/093,429 patent/US4849979A/en not_active Expired - Fee Related
- 1987-09-09 EP EP87113151A patent/EP0260584B1/en not_active Expired - Lifetime
- 1987-09-09 DE DE87113151T patent/DE3786862T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0260584B1 (en) | 1993-08-04 |
EP0260584A2 (en) | 1988-03-23 |
DE3786862D1 (de) | 1993-09-09 |
US4849979A (en) | 1989-07-18 |
DE3786862T2 (de) | 1994-01-20 |
IT8621727A0 (it) | 1986-09-17 |
EP0260584A3 (en) | 1990-05-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19950929 |