DE68912071D1 - Dünnfilm-Transistor mit einer Speicherfunktion und Verfahren zur Verwendung eines Dünnfilmtransistors als Speicherelement. - Google Patents

Dünnfilm-Transistor mit einer Speicherfunktion und Verfahren zur Verwendung eines Dünnfilmtransistors als Speicherelement.

Info

Publication number
DE68912071D1
DE68912071D1 DE89120014T DE68912071T DE68912071D1 DE 68912071 D1 DE68912071 D1 DE 68912071D1 DE 89120014 T DE89120014 T DE 89120014T DE 68912071 T DE68912071 T DE 68912071T DE 68912071 D1 DE68912071 D1 DE 68912071D1
Authority
DE
Germany
Prior art keywords
thin film
film transistor
memory
memory element
memory function
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE89120014T
Other languages
English (en)
Other versions
DE68912071T2 (de
Inventor
Hiroshi P D Dev Div Matsumoto
Hiroyasu P D Dev Div Ha Yamada
Nobuyuki P D Dev Div Yamamura
Shinichi P D Dev Div Shimomaki
Naohiro P D Dev Div Hamu Konya
Kyuya P D Dev Div Hamura Baba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP63270893A external-priority patent/JPH0831607B2/ja
Priority claimed from JP63282596A external-priority patent/JPH02130837A/ja
Priority claimed from JP1078390A external-priority patent/JPH02260462A/ja
Priority claimed from JP1087009A external-priority patent/JPH02266570A/ja
Priority claimed from JP1989043098U external-priority patent/JPH02137053U/ja
Priority claimed from JP1989043099U external-priority patent/JPH02137054U/ja
Priority claimed from JP1117580A external-priority patent/JPH02297972A/ja
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Publication of DE68912071D1 publication Critical patent/DE68912071D1/de
Application granted granted Critical
Publication of DE68912071T2 publication Critical patent/DE68912071T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
DE89120014T 1988-10-28 1989-10-27 Dünnfilm-Transistor mit einer Speicherfunktion und Verfahren zur Verwendung eines Dünnfilmtransistors als Speicherelement. Expired - Fee Related DE68912071T2 (de)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
JP63270893A JPH0831607B2 (ja) 1988-10-28 1988-10-28 メモリ用薄膜トランジスタ
JP63282596A JPH02130837A (ja) 1988-11-10 1988-11-10 薄膜トランジスタおよびその製造方法
JP1078390A JPH02260462A (ja) 1989-03-31 1989-03-31 薄膜メモリ素子
JP1087009A JPH02266570A (ja) 1989-04-07 1989-04-07 メモリ用薄膜トランジスタ
JP1989043099U JPH02137054U (de) 1989-04-14 1989-04-14
JP1989043098U JPH02137053U (de) 1989-04-14 1989-04-14
JP1117580A JPH02297972A (ja) 1989-05-12 1989-05-12 メモリ用薄膜トランジスタおよびそのゲート絶縁膜の形成方法

Publications (2)

Publication Number Publication Date
DE68912071D1 true DE68912071D1 (de) 1994-02-17
DE68912071T2 DE68912071T2 (de) 1994-04-28

Family

ID=27564561

Family Applications (1)

Application Number Title Priority Date Filing Date
DE89120014T Expired - Fee Related DE68912071T2 (de) 1988-10-28 1989-10-27 Dünnfilm-Transistor mit einer Speicherfunktion und Verfahren zur Verwendung eines Dünnfilmtransistors als Speicherelement.

Country Status (4)

Country Link
EP (1) EP0366146B1 (de)
KR (1) KR930003556B1 (de)
CA (1) CA2001682C (de)
DE (1) DE68912071T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3613594B2 (ja) * 1993-08-19 2005-01-26 株式会社ルネサステクノロジ 半導体素子およびこれを用いた半導体記憶装置
JP4538693B2 (ja) 1998-01-26 2010-09-08 ソニー株式会社 メモリ素子およびその製造方法
EP0986107A1 (de) * 1998-09-08 2000-03-15 STMicroelectronics S.r.l. Zellenanordnung für ein elektrisch löschbares und programmierbares nicht-flüchtiges Speicherbauelement
KR100730141B1 (ko) * 2005-08-02 2007-06-19 삼성에스디아이 주식회사 박막 트랜지스터 및 이를 구비한 평판표시장치
CN112909087A (zh) * 2021-03-08 2021-06-04 滁州惠科光电科技有限公司 一种显示面板、薄膜晶体管及其制备方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4096509A (en) * 1976-07-22 1978-06-20 The United States Of America As Represented By The Secretary Of The Air Force MNOS memory transistor having a redeposited silicon nitride gate dielectric
US4053917A (en) * 1976-08-16 1977-10-11 The United States Of America As Represented By The Secretary Of The Air Force Drain source protected MNOS transistor and method of manufacture
US4323910A (en) * 1977-11-28 1982-04-06 Rca Corporation MNOS Memory transistor
US4876582A (en) * 1983-05-02 1989-10-24 Ncr Corporation Crystallized silicon-on-insulator nonvolatile memory device
DE3483765D1 (de) * 1983-09-28 1991-01-31 Toshiba Kawasaki Kk Elektrisch loeschbare und programmierbare nichtfluechtige halbleiterspeicheranordnung mit zwei gate-elektroden.

Also Published As

Publication number Publication date
CA2001682C (en) 1994-05-03
DE68912071T2 (de) 1994-04-28
KR900007075A (ko) 1990-05-09
CA2001682A1 (en) 1990-04-28
EP0366146A2 (de) 1990-05-02
EP0366146A3 (en) 1990-11-07
KR930003556B1 (ko) 1993-05-06
EP0366146B1 (de) 1994-01-05

Similar Documents

Publication Publication Date Title
DE69323365D1 (de) Datenprozessor mit einer integrierten Datenbank und Verfahren dafür
DE69219281D1 (de) Verfahren und Vorrichtung mit Datenikonen
DE69118174D1 (de) Verfahren und vorrichtung zur vereinfachung der ortung einer untergrundformation in zusammenhang mit einer seismischen exploration
DE69014323D1 (de) Dünnfilmspeicher und Verfahren zu seiner Herstellung.
DE3782683D1 (de) Verfahren zur herstellung eines duennfilmtransistors.
DE69209585D1 (de) Klebefolie und Verfahren zum Verbinden von Elementen mit kleinen Löchern
DE69033153D1 (de) Verfahren zur Herstellung einer Halbleiterdünnschicht und damit hergestellte Halbleiterdünnschicht
DE69424126D1 (de) Verfahren und Gerät zur Vektorfehlerdiffusion mit Ausgabefarbsteuerung
DE69228481D1 (de) Verfahren zur individuellen anpassung eines gerätes mit einer chipkarte
DE3481089D1 (de) Photographisches silberhalogenidmaterial und verfahren zur herstellung eines hochkontrastnegatives unter verwendung desselben.
DE68915508D1 (de) Verfahren zur Herstellung einer nicht-flüchtigen Speicheranordnung.
DE68916311D1 (de) Verfahren zur Herstellung einer thermoplastischen Kunststoffolie und deren Verwendung als Puffermaterial.
DE3874045D1 (de) Verfahren und vorrichtung zur bildinformationsaufname mit korrigierter lesesteuerung.
DE69129915D1 (de) Kamera zur Verwendung eines Magnetschichtspeichers
DE69211218D1 (de) Dünnfilm Feldeffektanordnung mit einer LDD-Struktur und Verfahren zur Herstellung
DE69512186D1 (de) Ferroelektrische Dünnschicht, Substrat bedeckt mit einer ferroelektrischen Dünnschicht und Verfahren zur Herstellung einer ferroelektrischen Dünnschicht
DE3485624D1 (de) Verfahren und einrichtung zur kompensation von temperaturabhaengigen eigenschaftsaenderungen in ionenempfindlichen feldeffekttransistor-sensoren.
DE69013922D1 (de) Magnetkopf-aufhängevorrichtung zur verwendung bei fotografischen filmen.
DE3889725D1 (de) Verfahren und vorrichtung zur messfehlerkompensation.
DE68923267D1 (de) Verfahren und gerät zur speicherung.
DE3483233D1 (de) Einrichtung und verfahren zur steuerung einer anzeigeeinrichtung mit speichereigenschaft.
DE68908906D1 (de) Verfahren und Vorrichtung zur Herstellung einer Kunstoff-folie.
DE3674960D1 (de) Verfahren zur unkrautbekaempfung mit verwendung von diflufenican.
DE68912071D1 (de) Dünnfilm-Transistor mit einer Speicherfunktion und Verfahren zur Verwendung eines Dünnfilmtransistors als Speicherelement.
DE3866631D1 (de) Aufzeichnungsgeraet mit bleistift und verfahren dafuer.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee