DE68907237D1 - Verfahren fuer die herstellung von metallisierten loechern in einem substrat durch eine metallablagerung im vakuum und auf diese weise hergestelltes produkt. - Google Patents

Verfahren fuer die herstellung von metallisierten loechern in einem substrat durch eine metallablagerung im vakuum und auf diese weise hergestelltes produkt.

Info

Publication number
DE68907237D1
DE68907237D1 DE8989200550T DE68907237T DE68907237D1 DE 68907237 D1 DE68907237 D1 DE 68907237D1 DE 8989200550 T DE8989200550 T DE 8989200550T DE 68907237 T DE68907237 T DE 68907237T DE 68907237 D1 DE68907237 D1 DE 68907237D1
Authority
DE
Germany
Prior art keywords
substrate
holes
vacuum
production
way
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8989200550T
Other languages
English (en)
Other versions
DE68907237T2 (de
Inventor
Giampiero Ferraris
Tarcisio Cagnin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Italtel SpA
Siemens Telecomunicazioni SpA
Original Assignee
Siemens Telecomunicazioni SpA
Societa Italiana Telecomunicazioni Siemens SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Telecomunicazioni SpA, Societa Italiana Telecomunicazioni Siemens SpA filed Critical Siemens Telecomunicazioni SpA
Application granted granted Critical
Publication of DE68907237D1 publication Critical patent/DE68907237D1/de
Publication of DE68907237T2 publication Critical patent/DE68907237T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4076—Through-connections; Vertical interconnect access [VIA] connections by thin-film techniques
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0302—Properties and characteristics in general
    • H05K2201/0317—Thin film conductor layer; Thin film passive component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0352—Differences between the conductors of different layers of a multilayer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0361—Stripping a part of an upper metal layer to expose a lower metal layer, e.g. by etching or using a laser
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Physical Vapour Deposition (AREA)
  • Laminated Bodies (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
DE89200550T 1988-03-18 1989-03-06 Verfahren für die Herstellung von metallisierten Löchern in einem Substrat durch eine Metallablagerung im Vakuum und auf diese Weise hergestelltes Produkt. Expired - Fee Related DE68907237T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8819830A IT1216135B (it) 1988-03-18 1988-03-18 Dielettrico mediante deposizioni in processo per la realizzazione di vuoto di metalli, e relativo fori metallizzati in un substrato prodotto ottenuto.

Publications (2)

Publication Number Publication Date
DE68907237D1 true DE68907237D1 (de) 1993-07-29
DE68907237T2 DE68907237T2 (de) 1993-12-02

Family

ID=11161637

Family Applications (1)

Application Number Title Priority Date Filing Date
DE89200550T Expired - Fee Related DE68907237T2 (de) 1988-03-18 1989-03-06 Verfahren für die Herstellung von metallisierten Löchern in einem Substrat durch eine Metallablagerung im Vakuum und auf diese Weise hergestelltes Produkt.

Country Status (9)

Country Link
US (1) US5011761A (de)
EP (1) EP0333252B1 (de)
AT (1) ATE91061T1 (de)
AU (1) AU618584B2 (de)
DE (1) DE68907237T2 (de)
ES (1) ES2041394T3 (de)
IT (1) IT1216135B (de)
NO (1) NO175610C (de)
ZA (1) ZA891890B (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5584956A (en) * 1992-12-09 1996-12-17 University Of Iowa Research Foundation Method for producing conductive or insulating feedthroughs in a substrate
EP0670668B1 (de) * 1993-12-22 1998-01-28 Italtel s.p.a. Verfahren zur Herstellung von metallisierten Löchern in dielektrischen Substraten mit untereinander verbundenen Dünnschichtleiter- und/oder Widerstandsbahnen
DE19524099A1 (de) * 1995-07-01 1997-01-02 Karlsruhe Forschzent Verfahren zur Herstellung von Formeinsätzen
US7479304B2 (en) * 2002-02-14 2009-01-20 Applied Materials, Inc. Gas distribution plate fabricated from a solid yttrium oxide-comprising substrate
ITTO20030846A1 (it) * 2003-10-28 2005-04-29 Intier Automotive Closures Spa Procedimento per la realizzazione di un corpo di supporto per una serratura di un autoveicolo e corpo di supporto cosi' ottenuto.
US10622194B2 (en) 2007-04-27 2020-04-14 Applied Materials, Inc. Bulk sintered solid solution ceramic which exhibits fracture toughness and halogen plasma resistance
US10242888B2 (en) 2007-04-27 2019-03-26 Applied Materials, Inc. Semiconductor processing apparatus with a ceramic-comprising surface which exhibits fracture toughness and halogen plasma resistance

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4226932A (en) * 1979-07-05 1980-10-07 Gte Automatic Electric Laboratories Incorporated Titanium nitride as one layer of a multi-layered coating intended to be etched
DE3427015A1 (de) * 1984-07-21 1986-01-30 Nippon Mektron, Ltd., Tokio/Tokyo Verfahren zur herstellung von durchkontaktierungen in gedruckten schaltungen
IT1191680B (it) * 1986-03-19 1988-03-23 Gte Telecom Spa Processo per la realizzazione di fori metallizzati in un substrato dotato di cammini conduttivi e resistivi,e prodotto ottenuto con il processo suddetto
IT1197776B (it) * 1986-07-15 1988-12-06 Gte Telecom Spa Processo per l'ottenimento di circuiti passivi a strato sottile con linee resistive a differenti resistenze di strato e circuito passivo realizzato con il processo suddetto

Also Published As

Publication number Publication date
NO175610C (no) 1994-11-02
EP0333252A3 (en) 1990-09-05
DE68907237T2 (de) 1993-12-02
AU3117989A (en) 1989-09-21
NO891153L (no) 1989-09-19
ZA891890B (en) 1989-11-29
ATE91061T1 (de) 1993-07-15
EP0333252B1 (de) 1993-06-23
NO175610B (no) 1994-07-25
AU618584B2 (en) 1992-01-02
EP0333252A2 (de) 1989-09-20
US5011761A (en) 1991-04-30
IT8819830A0 (it) 1988-03-18
NO891153D0 (no) 1989-03-16
IT1216135B (it) 1990-02-22
ES2041394T3 (es) 1993-11-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee