IT1191680B - Processo per la realizzazione di fori metallizzati in un substrato dotato di cammini conduttivi e resistivi,e prodotto ottenuto con il processo suddetto - Google Patents

Processo per la realizzazione di fori metallizzati in un substrato dotato di cammini conduttivi e resistivi,e prodotto ottenuto con il processo suddetto

Info

Publication number
IT1191680B
IT1191680B IT19803/86A IT1980386A IT1191680B IT 1191680 B IT1191680 B IT 1191680B IT 19803/86 A IT19803/86 A IT 19803/86A IT 1980386 A IT1980386 A IT 1980386A IT 1191680 B IT1191680 B IT 1191680B
Authority
IT
Italy
Prior art keywords
realization
conductive
product obtained
substrate equipped
resistive paths
Prior art date
Application number
IT19803/86A
Other languages
English (en)
Other versions
IT8619803A0 (it
IT8619803A1 (it
Inventor
Carla Bassani
Carlo Villa
Maurizio Ziboni
Original Assignee
Gte Telecom Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gte Telecom Spa filed Critical Gte Telecom Spa
Priority to IT19803/86A priority Critical patent/IT1191680B/it
Publication of IT8619803A0 publication Critical patent/IT8619803A0/it
Priority to EP87200298A priority patent/EP0238118A2/en
Publication of IT8619803A1 publication Critical patent/IT8619803A1/it
Application granted granted Critical
Publication of IT1191680B publication Critical patent/IT1191680B/it

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistors, capacitors or inductors
    • H05K1/167Printed circuits incorporating printed electric components, e.g. printed resistors, capacitors or inductors incorporating printed resistors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/428Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0302Properties and characteristics in general
    • H05K2201/0317Thin film conductor layer; Thin film passive component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0502Patterning and lithography
    • H05K2203/0542Continuous temporary metal layer over metal pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
IT19803/86A 1986-03-19 1986-03-19 Processo per la realizzazione di fori metallizzati in un substrato dotato di cammini conduttivi e resistivi,e prodotto ottenuto con il processo suddetto IT1191680B (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT19803/86A IT1191680B (it) 1986-03-19 1986-03-19 Processo per la realizzazione di fori metallizzati in un substrato dotato di cammini conduttivi e resistivi,e prodotto ottenuto con il processo suddetto
EP87200298A EP0238118A2 (en) 1986-03-19 1987-02-24 Process for making metallized holes in a substrate having conductive and resistive paths and the product obtained by said process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT19803/86A IT1191680B (it) 1986-03-19 1986-03-19 Processo per la realizzazione di fori metallizzati in un substrato dotato di cammini conduttivi e resistivi,e prodotto ottenuto con il processo suddetto

Publications (3)

Publication Number Publication Date
IT8619803A0 IT8619803A0 (it) 1986-03-19
IT8619803A1 IT8619803A1 (it) 1987-09-19
IT1191680B true IT1191680B (it) 1988-03-23

Family

ID=11161372

Family Applications (1)

Application Number Title Priority Date Filing Date
IT19803/86A IT1191680B (it) 1986-03-19 1986-03-19 Processo per la realizzazione di fori metallizzati in un substrato dotato di cammini conduttivi e resistivi,e prodotto ottenuto con il processo suddetto

Country Status (2)

Country Link
EP (1) EP0238118A2 (it)
IT (1) IT1191680B (it)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1216135B (it) * 1988-03-18 1990-02-22 Sits Soc It Telecom Siemens Dielettrico mediante deposizioni in processo per la realizzazione di vuoto di metalli, e relativo fori metallizzati in un substrato prodotto ottenuto.
WO1992009102A1 (en) * 1990-11-15 1992-05-29 International Business Machines Corporation A method of making a multilayer thin film structure
US5266446A (en) * 1990-11-15 1993-11-30 International Business Machines Corporation Method of making a multilayer thin film structure
ATE162924T1 (de) * 1993-12-22 1998-02-15 Italtel Spa Verfahren zur herstellung von metallisierten löchern in dielektrischen substraten mit untereinander verbundenen dünnschichtleiter- und/oder widerstandsbahnen
SE523150C2 (sv) 2000-01-14 2004-03-30 Ericsson Telefon Ab L M Kretsmönsterkort och metod för tillverkning av kretsmönsterkort med tunt kopparskikt

Also Published As

Publication number Publication date
IT8619803A0 (it) 1986-03-19
IT8619803A1 (it) 1987-09-19
EP0238118A2 (en) 1987-09-23

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