PT85287A - Processo para a preparacao de placas condutoras com a superficie de cobre - Google Patents

Processo para a preparacao de placas condutoras com a superficie de cobre

Info

Publication number
PT85287A
PT85287A PT8528787A PT8528787A PT85287A PT 85287 A PT85287 A PT 85287A PT 8528787 A PT8528787 A PT 8528787A PT 8528787 A PT8528787 A PT 8528787A PT 85287 A PT85287 A PT 85287A
Authority
PT
Portugal
Prior art keywords
preparation
conductive plates
copper surface
copper
conductive
Prior art date
Application number
PT8528787A
Other languages
English (en)
Inventor
Reinhard De Boer
Original Assignee
Deutsche Telephonwerk Kabel
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche Telephonwerk Kabel filed Critical Deutsche Telephonwerk Kabel
Publication of PT85287A publication Critical patent/PT85287A/pt

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3473—Plating of solder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/062—Etching masks consisting of metals or alloys or metallic inorganic compounds
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0361—Stripping a part of an upper metal layer to expose a lower metal layer, e.g. by etching or using a laser
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metallurgy (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Chemical Treatment Of Metals (AREA)
PT8528787A 1986-07-09 1987-07-08 Processo para a preparacao de placas condutoras com a superficie de cobre PT85287A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19863623505 DE3623505A1 (de) 1986-07-09 1986-07-09 Verfahren zum herstellen von leiterplatten mit selektiv auf den loetaugen und lochwandungen aufgebrachten galvanischen blei-zinn-schichten

Publications (1)

Publication Number Publication Date
PT85287A true PT85287A (pt) 1988-07-29

Family

ID=6305010

Family Applications (1)

Application Number Title Priority Date Filing Date
PT8528787A PT85287A (pt) 1986-07-09 1987-07-08 Processo para a preparacao de placas condutoras com a superficie de cobre

Country Status (4)

Country Link
EP (1) EP0252399A3 (pt)
DE (1) DE3623505A1 (pt)
DK (1) DK348187A (pt)
PT (1) PT85287A (pt)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4978423A (en) * 1988-09-26 1990-12-18 At&T Bell Laboratories Selective solder formation on printed circuit boards
DE19619292A1 (de) * 1996-05-13 1997-11-20 Siemens Ag Leiterplattenherstellungsverfahren
DE102007045930A1 (de) * 2007-09-24 2009-04-09 Rolf Bauer Verfahren zur Herstellung einer partiellen galvanischen Reinzinn-Oberfläche auf Leiterplatten

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2209178B2 (de) * 1972-02-26 1974-12-19 Robert Bosch Fernsehanlagen Gmbh, 6100 Darmstadt Verfahren zur Herstellung gedruckter Schaltungen
DE2241961C3 (de) * 1972-08-25 1981-06-25 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zur Herstellung eines Oberflächenschutzes für gedruckte Schaltungen
DE7529988U (de) * 1975-09-23 1976-02-12 Korsten & Goossens Ohg, 5657 Haan Feinleiterplatte mit selektiv verzinnten loetaugen und lochwandungen
US4104111A (en) * 1977-08-03 1978-08-01 Mack Robert L Process for manufacturing printed circuit boards
GB2087157B (en) * 1980-11-05 1984-06-06 Quassia Electronics Ltd Solder plating printed circuit boards
DE3214807C1 (en) * 1982-04-21 1983-10-06 Siemens Ag Process for producing etched printed circuit boards
US4487828A (en) * 1983-06-03 1984-12-11 At&T Technologies, Inc. Method of manufacturing printed circuit boards
US4487654A (en) * 1983-10-27 1984-12-11 Ael Microtel Limited Method of manufacturing printed wiring boards
DE3408630A1 (de) * 1984-03-09 1985-09-12 Hoechst Ag, 6230 Frankfurt Verfahren und schichtmaterial zur herstellung durchkontaktierter elektrischer leiterplatten
DE3412447A1 (de) * 1984-03-31 1985-11-28 Schering AG, 1000 Berlin und 4709 Bergkamen Verfahren zur herstellung von gedruckten schaltungen

Also Published As

Publication number Publication date
DE3623505C2 (pt) 1988-04-28
DK348187A (da) 1988-01-10
EP0252399A2 (de) 1988-01-13
DE3623505A1 (de) 1988-01-21
DK348187D0 (da) 1987-07-07
EP0252399A3 (de) 1989-06-28

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Legal Events

Date Code Title Description
FC3A Refusal

Effective date: 19931026