DE602005020437D1 - Spannungsversorgungsschaltung und Halbleiterspeicher - Google Patents

Spannungsversorgungsschaltung und Halbleiterspeicher

Info

Publication number
DE602005020437D1
DE602005020437D1 DE602005020437T DE602005020437T DE602005020437D1 DE 602005020437 D1 DE602005020437 D1 DE 602005020437D1 DE 602005020437 T DE602005020437 T DE 602005020437T DE 602005020437 T DE602005020437 T DE 602005020437T DE 602005020437 D1 DE602005020437 D1 DE 602005020437D1
Authority
DE
Germany
Prior art keywords
power supply
semiconductor memory
supply circuit
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005020437T
Other languages
English (en)
Inventor
Atsushi Takeuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Semiconductor Ltd filed Critical Fujitsu Semiconductor Ltd
Publication of DE602005020437D1 publication Critical patent/DE602005020437D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4094—Bit-line management or control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22—Control and timing of internal memory operations
    • G11C2207/2227—Standby or low power modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
  • Amplifiers (AREA)
DE602005020437T 2005-06-27 2005-10-25 Spannungsversorgungsschaltung und Halbleiterspeicher Active DE602005020437D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005186408A JP4255082B2 (ja) 2005-06-27 2005-06-27 電圧供給回路および半導体メモリ

Publications (1)

Publication Number Publication Date
DE602005020437D1 true DE602005020437D1 (de) 2010-05-20

Family

ID=37101792

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005020437T Active DE602005020437D1 (de) 2005-06-27 2005-10-25 Spannungsversorgungsschaltung und Halbleiterspeicher

Country Status (7)

Country Link
US (3) US7251169B2 (de)
EP (1) EP1739682B1 (de)
JP (1) JP4255082B2 (de)
KR (1) KR100665643B1 (de)
CN (1) CN100527273C (de)
DE (1) DE602005020437D1 (de)
TW (1) TWI276103B (de)

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CN1307720C (zh) * 2003-06-27 2007-03-28 富士通株式会社 半导体集成电路
JP4255082B2 (ja) * 2005-06-27 2009-04-15 富士通マイクロエレクトロニクス株式会社 電圧供給回路および半導体メモリ
US7926591B2 (en) 2006-02-10 2011-04-19 Halliburton Energy Services, Inc. Aqueous-based emulsified consolidating agents suitable for use in drill-in applications
US7819192B2 (en) * 2006-02-10 2010-10-26 Halliburton Energy Services, Inc. Consolidating agent emulsions and associated methods
JP5261888B2 (ja) * 2006-05-18 2013-08-14 富士通セミコンダクター株式会社 半導体記憶装置
KR100859260B1 (ko) * 2006-10-12 2008-09-18 주식회사 하이닉스반도체 메모리 소자의 전압 제공 회로
KR100915814B1 (ko) * 2007-09-07 2009-09-07 주식회사 하이닉스반도체 반도체 메모리 장치의 데이터 출력 드라이버 제어회로
US8436659B1 (en) * 2008-06-24 2013-05-07 Marvell International Ltd. Circuits and methods for reducing electrical stress on a transistor
JP5112208B2 (ja) * 2008-07-18 2013-01-09 ルネサスエレクトロニクス株式会社 レギュレータ及び半導体装置
KR101001140B1 (ko) * 2008-11-06 2010-12-15 주식회사 하이닉스반도체 반도체 메모리 소자와 터미네이션 동작 방법
US8222927B2 (en) * 2009-04-09 2012-07-17 Mediatek Inc. Reference buffer circuit
KR101226275B1 (ko) * 2011-02-28 2013-01-25 에스케이하이닉스 주식회사 내부전압생성회로
KR101790580B1 (ko) * 2011-12-08 2017-10-30 에스케이하이닉스 주식회사 반도체 장치 및 그 동작방법
US9128501B2 (en) * 2013-09-11 2015-09-08 Altera Corporation Regulator circuitry capable of tracking reference voltages
KR20150122515A (ko) * 2014-04-23 2015-11-02 삼성전자주식회사 소스 드라이버
KR102507170B1 (ko) * 2016-02-29 2023-03-09 에스케이하이닉스 주식회사 센스 앰프 및 이를 포함하는 반도체 장치의 입/출력 회로
US10250139B2 (en) * 2016-03-31 2019-04-02 Micron Technology, Inc. Apparatuses and methods for a load current control circuit for a source follower voltage regulator
US9911469B1 (en) * 2016-11-10 2018-03-06 Micron Technology, Inc. Apparatuses and methods for power efficient driver circuits
KR102576765B1 (ko) 2016-11-28 2023-09-11 에스케이하이닉스 주식회사 내부전압생성회로
US9997230B1 (en) * 2017-06-20 2018-06-12 Elite Semiconductor Memory Technology Inc. Reference voltage pre-processing circuit and reference voltage pre-processing method for a reference voltage buffer
WO2020098476A1 (en) * 2018-11-13 2020-05-22 Changxin Memory Technologies, Inc. Input buffer circuit, intelligent optimization method, and semiconductor memory thereof
US10998035B1 (en) * 2019-10-17 2021-05-04 Micron Technology, Inc. Power-efficient generation of voltage
KR20210105187A (ko) * 2020-02-18 2021-08-26 에스케이하이닉스 주식회사 전압 생성 회로 및 이를 이용하는 비휘발성 메모리 장치
US11205470B2 (en) * 2020-04-20 2021-12-21 Micron Technology, Inc. Apparatuses and methods for providing main word line signal with dynamic well
US11990175B2 (en) 2022-04-01 2024-05-21 Micron Technology, Inc. Apparatuses and methods for controlling word line discharge

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3705842B2 (ja) * 1994-08-04 2005-10-12 株式会社ルネサステクノロジ 半導体装置
TW318932B (de) * 1995-12-28 1997-11-01 Hitachi Ltd
US6462584B1 (en) * 1999-02-13 2002-10-08 Integrated Device Technology, Inc. Generating a tail current for a differential transistor pair using a capacitive device to project a current flowing through a current source device onto a node having a different voltage than the current source device
KR100336751B1 (ko) * 1999-07-28 2002-05-13 박종섭 전압 조정회로
JP2001325792A (ja) 2000-03-08 2001-11-22 Sony Corp 電圧供給回路
KR100464435B1 (ko) * 2002-11-08 2004-12-31 삼성전자주식회사 저 전력의 하프 전압 발생 장치
KR100626367B1 (ko) * 2003-10-02 2006-09-20 삼성전자주식회사 내부전압 발생장치
JP4249602B2 (ja) * 2003-11-28 2009-04-02 エルピーダメモリ株式会社 半導体記憶装置
JP4255082B2 (ja) * 2005-06-27 2009-04-15 富士通マイクロエレクトロニクス株式会社 電圧供給回路および半導体メモリ

Also Published As

Publication number Publication date
JP4255082B2 (ja) 2009-04-15
KR100665643B1 (ko) 2007-01-10
US20090086555A1 (en) 2009-04-02
US20060291317A1 (en) 2006-12-28
CN100527273C (zh) 2009-08-12
EP1739682B1 (de) 2010-04-07
TWI276103B (en) 2007-03-11
US7821863B2 (en) 2010-10-26
US7251169B2 (en) 2007-07-31
US7460416B2 (en) 2008-12-02
TW200701228A (en) 2007-01-01
EP1739682A1 (de) 2007-01-03
JP2007004928A (ja) 2007-01-11
CN1889188A (zh) 2007-01-03
US20070159896A1 (en) 2007-07-12
KR20070000959A (ko) 2007-01-03

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU SEMICONDUCTOR LTD., YOKOHAMA, KANAGAWA, JP

8328 Change in the person/name/address of the agent

Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE

8364 No opposition during term of opposition