DE602005015578D1 - - Google Patents

Info

Publication number
DE602005015578D1
DE602005015578D1 DE602005015578T DE602005015578T DE602005015578D1 DE 602005015578 D1 DE602005015578 D1 DE 602005015578D1 DE 602005015578 T DE602005015578 T DE 602005015578T DE 602005015578 T DE602005015578 T DE 602005015578T DE 602005015578 D1 DE602005015578 D1 DE 602005015578D1
Authority
DE
Germany
Prior art keywords
sent
memory unit
busy control
controller
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005015578T
Other languages
English (en)
Inventor
Peter John Smith
Sergey Anatolievich Gorobets
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SanDisk Corp
Original Assignee
SanDisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SanDisk Corp filed Critical SanDisk Corp
Publication of DE602005015578D1 publication Critical patent/DE602005015578D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
DE602005015578T 2004-05-27 2005-05-20 Active DE602005015578D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/857,532 US8429313B2 (en) 2004-05-27 2004-05-27 Configurable ready/busy control
PCT/US2005/017770 WO2005119693A2 (en) 2004-05-27 2005-05-20 Configurable ready/busy control

Publications (1)

Publication Number Publication Date
DE602005015578D1 true DE602005015578D1 (de) 2009-09-03

Family

ID=35004258

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005015578T Active DE602005015578D1 (de) 2004-05-27 2005-05-20

Country Status (9)

Country Link
US (1) US8429313B2 (de)
EP (1) EP1751772B1 (de)
JP (1) JP2008500678A (de)
KR (1) KR101182597B1 (de)
CN (1) CN100589204C (de)
AT (1) ATE437440T1 (de)
DE (1) DE602005015578D1 (de)
TW (1) TWI280580B (de)
WO (1) WO2005119693A2 (de)

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US8429313B2 (en) 2004-05-27 2013-04-23 Sandisk Technologies Inc. Configurable ready/busy control
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US8144496B2 (en) * 2009-06-30 2012-03-27 Sandisk Technologies Inc. Memory system with multi-level status signaling and method for operating the same
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CN102693195A (zh) * 2011-03-24 2012-09-26 凌阳科技股份有限公司 用以最优化同步存储器的频宽的存储器存取系统及方法
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US9417685B2 (en) * 2013-01-07 2016-08-16 Micron Technology, Inc. Power management
US9335952B2 (en) * 2013-03-01 2016-05-10 Ocz Storage Solutions, Inc. System and method for polling the status of memory devices
CN103247613B (zh) * 2013-04-09 2016-03-30 北京兆易创新科技股份有限公司 增强型Flash的多芯片的封装芯片、通信方法和封装方法
CN103246553B (zh) * 2013-04-09 2016-12-28 北京兆易创新科技股份有限公司 一种增强型Flash芯片和一种芯片封装方法
CN103247611B (zh) * 2013-04-09 2015-09-09 北京兆易创新科技股份有限公司 一种增强型flash芯片和一种芯片封装方法
CN103247612B (zh) * 2013-04-09 2015-09-23 北京兆易创新科技股份有限公司 一种增强型flash芯片和一种芯片封装方法
US9620182B2 (en) 2013-12-31 2017-04-11 Sandisk Technologies Llc Pulse mechanism for memory circuit interruption
JP2015176309A (ja) 2014-03-14 2015-10-05 株式会社東芝 半導体記憶装置
CN105511807B (zh) * 2015-11-30 2018-05-22 杭州华澜微电子股份有限公司 一种基于存储设备的数据存储管理方法及系统
KR102554416B1 (ko) 2016-08-16 2023-07-11 삼성전자주식회사 메모리 장치의 내부 상태 출력 장치 및 이를 적용하는 메모리 시스템
JP2018041154A (ja) * 2016-09-05 2018-03-15 東芝メモリ株式会社 ストレージシステムおよび処理方法
KR102632452B1 (ko) * 2016-10-17 2024-02-05 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그 동작 방법
JP2019046254A (ja) * 2017-09-04 2019-03-22 東芝メモリ株式会社 半導体メモリ装置、方法及びプログラム
KR20190032809A (ko) * 2017-09-20 2019-03-28 에스케이하이닉스 주식회사 메모리 시스템 및 그것의 동작 방법
KR102408482B1 (ko) * 2017-10-20 2022-06-14 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그 동작 방법
CN111210855B (zh) * 2019-12-30 2020-09-15 深圳市芯天下技术有限公司 一种多晶元叠封存储器及其输出同步方法
US11513976B2 (en) * 2020-03-31 2022-11-29 Western Digital Technologies, Inc. Advanced CE encoding for bus multiplexer grid for SSD
CN113448962B (zh) * 2021-06-02 2022-10-28 中科驭数(北京)科技有限公司 数据库数据管理方法和装置

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US8429313B2 (en) 2004-05-27 2013-04-23 Sandisk Technologies Inc. Configurable ready/busy control

Also Published As

Publication number Publication date
CN1981345A (zh) 2007-06-13
TW200620290A (en) 2006-06-16
ATE437440T1 (de) 2009-08-15
JP2008500678A (ja) 2008-01-10
EP1751772B1 (de) 2009-07-22
WO2005119693A3 (en) 2006-04-13
EP1751772A2 (de) 2007-02-14
CN100589204C (zh) 2010-02-10
KR101182597B1 (ko) 2012-09-18
US8429313B2 (en) 2013-04-23
KR20070024545A (ko) 2007-03-02
US20050268025A1 (en) 2005-12-01
TWI280580B (en) 2007-05-01
WO2005119693A2 (en) 2005-12-15

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