TW200727308A - Memory module having address transforming function and method for controlling memory - Google Patents

Memory module having address transforming function and method for controlling memory

Info

Publication number
TW200727308A
TW200727308A TW095101371A TW95101371A TW200727308A TW 200727308 A TW200727308 A TW 200727308A TW 095101371 A TW095101371 A TW 095101371A TW 95101371 A TW95101371 A TW 95101371A TW 200727308 A TW200727308 A TW 200727308A
Authority
TW
Taiwan
Prior art keywords
memory
memory module
transforming function
controlling
address
Prior art date
Application number
TW095101371A
Other languages
Chinese (zh)
Other versions
TWI287801B (en
Inventor
Shih-Jung Cheng
Original Assignee
Optimum Care Int Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Optimum Care Int Tech Inc filed Critical Optimum Care Int Tech Inc
Priority to TW95101371A priority Critical patent/TWI287801B/en
Publication of TW200727308A publication Critical patent/TW200727308A/en
Application granted granted Critical
Publication of TWI287801B publication Critical patent/TWI287801B/en

Links

Abstract

The present invention provides a memory module having address transforming function and method for controlling memory. The memory module includes a board of memory module, an accessing data channel, a plurality of first memory unit each including a plurality of memory banks and a plurality of second memory unit each including a plurality of memory banks, and a circuit for transforming a system accessing signal; the memory module can integrate at least two memory units having defect into a workable memory unit by means of address reading and transferring from a memory accessing signals generated by a system.
TW95101371A 2006-01-13 2006-01-13 Memory module having address transforming function and method for controlling memory TWI287801B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW95101371A TWI287801B (en) 2006-01-13 2006-01-13 Memory module having address transforming function and method for controlling memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW95101371A TWI287801B (en) 2006-01-13 2006-01-13 Memory module having address transforming function and method for controlling memory

Publications (2)

Publication Number Publication Date
TW200727308A true TW200727308A (en) 2007-07-16
TWI287801B TWI287801B (en) 2007-10-01

Family

ID=39201775

Family Applications (1)

Application Number Title Priority Date Filing Date
TW95101371A TWI287801B (en) 2006-01-13 2006-01-13 Memory module having address transforming function and method for controlling memory

Country Status (1)

Country Link
TW (1) TWI287801B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI671759B (en) * 2017-09-21 2019-09-11 日商東芝記憶體股份有限公司 Semiconductor memory device

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012103245A2 (en) 2011-01-27 2012-08-02 Soft Machines Inc. Guest instruction block with near branching and far branching sequence construction to native instruction block
WO2012103367A2 (en) 2011-01-27 2012-08-02 Soft Machines, Inc. Guest to native block address mappings and management of native code storage
CN103620547B (en) 2011-01-27 2018-07-10 英特尔公司 Using processor translation lookaside buffer based on customer instruction to the mapping of native instructions range
WO2012103253A2 (en) * 2011-01-27 2012-08-02 Soft Machines, Inc. Multilevel conversion table cache for translating guest instructions to native instructions
WO2012103359A2 (en) 2011-01-27 2012-08-02 Soft Machines, Inc. Hardware acceleration components for translating guest instructions to native instructions
WO2012103373A2 (en) 2011-01-27 2012-08-02 Soft Machines, Inc. Variable caching structure for managing physical storage
WO2014151691A1 (en) 2013-03-15 2014-09-25 Soft Machines, Inc. Method and apparatus for guest return address stack emulation supporting speculation
WO2014151652A1 (en) 2013-03-15 2014-09-25 Soft Machines Inc Method and apparatus to allow early dependency resolution and data forwarding in a microprocessor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI671759B (en) * 2017-09-21 2019-09-11 日商東芝記憶體股份有限公司 Semiconductor memory device
US10418345B2 (en) 2017-09-21 2019-09-17 Toshiba Memory Corporation Semiconductor memory device
US11322480B2 (en) 2017-09-21 2022-05-03 Kioxia Corporation Semiconductor memory device

Also Published As

Publication number Publication date
TWI287801B (en) 2007-10-01

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MM4A Annulment or lapse of patent due to non-payment of fees