DE602005009081D1 - Dynamische Speicherkonfigurierung - Google Patents

Dynamische Speicherkonfigurierung

Info

Publication number
DE602005009081D1
DE602005009081D1 DE602005009081T DE602005009081T DE602005009081D1 DE 602005009081 D1 DE602005009081 D1 DE 602005009081D1 DE 602005009081 T DE602005009081 T DE 602005009081T DE 602005009081 T DE602005009081 T DE 602005009081T DE 602005009081 D1 DE602005009081 D1 DE 602005009081D1
Authority
DE
Germany
Prior art keywords
dynamic storage
storage configuration
configuration
dynamic
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005009081T
Other languages
English (en)
Inventor
Tetsuo Kawano
Hiroshi Furukawa
Ichiro Kasama
Kazuaki Imafuku
Toshiaki Suzuki
Miyoshi Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE602005009081D1 publication Critical patent/DE602005009081D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1694—Configuration of memory controller to different memory types
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
DE602005009081T 2004-06-30 2005-01-26 Dynamische Speicherkonfigurierung Active DE602005009081D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004194103A JP4451733B2 (ja) 2004-06-30 2004-06-30 半導体装置

Publications (1)

Publication Number Publication Date
DE602005009081D1 true DE602005009081D1 (de) 2008-10-02

Family

ID=34940396

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005009081T Active DE602005009081D1 (de) 2004-06-30 2005-01-26 Dynamische Speicherkonfigurierung

Country Status (5)

Country Link
US (1) US7908453B2 (de)
EP (2) EP1612682B1 (de)
JP (1) JP4451733B2 (de)
CN (1) CN100397334C (de)
DE (1) DE602005009081D1 (de)

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JP2008085864A (ja) * 2006-09-28 2008-04-10 Fujitsu Ltd 半導体装置
JP4962305B2 (ja) * 2007-12-26 2012-06-27 富士通セミコンダクター株式会社 リコンフィギュラブル回路
EP2221822A1 (de) 2009-02-23 2010-08-25 Gemalto SA Auswahlverfahren eines verfügbaren Speicherformats in einer Schaltung, die mindestens einen Prozessor und einen Speicher sowie entsprechende Software und Chipkarte umfasst
JP5375441B2 (ja) * 2009-08-27 2013-12-25 株式会社リコー 半導体集積回路、記憶制御方法、記憶制御プログラム及び記録媒体
JP5776306B2 (ja) * 2011-04-25 2015-09-09 富士ゼロックス株式会社 画像データ処理装置及びプログラム
KR101442708B1 (ko) * 2012-11-28 2014-09-22 주식회사 휴비츠 3차원 ｏｃｔ 데이터를 처리하기 위한 광 간섭 단층 촬영장치
US9158704B2 (en) * 2013-01-24 2015-10-13 Wisconsin Alumni Research Foundation Virtual memory management system with reduced latency
JP6254517B2 (ja) * 2014-12-22 2017-12-27 富士通フロンテック株式会社 媒体取扱装置
CN106649136B (zh) * 2015-11-03 2022-09-23 西安中兴新软件有限责任公司 一种数据存储方法和存储装置
US10776312B2 (en) * 2017-03-14 2020-09-15 Azurengine Technologies Zhuhai Inc. Shared memory access for a reconfigurable parallel processor with a plurality of chained memory ports
JP2022040721A (ja) * 2020-08-31 2022-03-11 富士フイルムビジネスイノベーション株式会社 情報処理装置、及びプログラム
CN112540953A (zh) * 2020-12-18 2021-03-23 广东高云半导体科技股份有限公司 基于fpga和mcu实现的片上系统

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Also Published As

Publication number Publication date
US20060004979A1 (en) 2006-01-05
EP1612682B1 (de) 2008-08-20
CN100397334C (zh) 2008-06-25
EP1906312B1 (de) 2012-07-25
JP2006018452A (ja) 2006-01-19
EP1612682A1 (de) 2006-01-04
US7908453B2 (en) 2011-03-15
EP1906312A1 (de) 2008-04-02
CN1716180A (zh) 2006-01-04
JP4451733B2 (ja) 2010-04-14

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU MICROELECTRONICS LTD., TOKYO, JP

8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU SEMICONDUCTOR LTD., YOKOHAMA, KANAGAWA, JP

8328 Change in the person/name/address of the agent

Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE