DE602004019327D1 - ATAPI Schalter - Google Patents

ATAPI Schalter

Info

Publication number
DE602004019327D1
DE602004019327D1 DE602004019327T DE602004019327T DE602004019327D1 DE 602004019327 D1 DE602004019327 D1 DE 602004019327D1 DE 602004019327 T DE602004019327 T DE 602004019327T DE 602004019327 T DE602004019327 T DE 602004019327T DE 602004019327 D1 DE602004019327 D1 DE 602004019327D1
Authority
DE
Germany
Prior art keywords
data processing
storage drive
switch
processing devices
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602004019327T
Other languages
English (en)
Inventor
Pirmin Weisser
Michael Maier
Ruediger Gausmann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Harman Becker Automotive Systems GmbH
Original Assignee
Harman Becker Automotive Systems GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Harman Becker Automotive Systems GmbH filed Critical Harman Becker Automotive Systems GmbH
Publication of DE602004019327D1 publication Critical patent/DE602004019327D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604—Improving or facilitating administration, e.g. storage management
    • G06F3/0607—Improving or facilitating administration, e.g. storage management by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G06F3/0635—Configuration or reconfiguration of storage systems by changing the path, e.g. traffic rerouting, path reconfiguration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658—Controller construction arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0674—Disk device

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Multi Processors (AREA)
  • Storing Facsimile Image Data (AREA)
  • Image Input (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
DE602004019327T 2004-02-18 2004-02-18 ATAPI Schalter Expired - Lifetime DE602004019327D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP04003680A EP1566737B1 (de) 2004-02-18 2004-02-18 ATAPI Schalter

Publications (1)

Publication Number Publication Date
DE602004019327D1 true DE602004019327D1 (de) 2009-03-19

Family

ID=34707316

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004019327T Expired - Lifetime DE602004019327D1 (de) 2004-02-18 2004-02-18 ATAPI Schalter

Country Status (8)

Country Link
US (1) US7546396B2 (de)
EP (1) EP1566737B1 (de)
JP (1) JP5026672B2 (de)
KR (1) KR101135705B1 (de)
CN (1) CN100504745C (de)
AT (1) ATE422261T1 (de)
CA (1) CA2496063C (de)
DE (1) DE602004019327D1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4610211B2 (ja) * 2004-03-11 2011-01-12 クラリオン株式会社 データ転送装置、データ転送装置の制御方法、制御プログラム及び記録媒体
CN1945518A (zh) * 2005-10-08 2007-04-11 华硕电脑股份有限公司 电子装置与控制模块
EP2288196B1 (de) * 2006-01-11 2018-02-21 Qualcomm Incorporated Drahtloses Kommunikationsverfahren und Vorrichtung zur Unterstützung der Synchronisation
KR101261022B1 (ko) 2006-01-19 2013-05-06 삼성전자주식회사 데이터 처리 장치 및 이의 프로그램 데이터 셋팅 방법
US7969746B2 (en) * 2006-09-22 2011-06-28 Itt Manufacturing Enterprises, Inc. Connection of a system module to an electronic device
AU2007216911B2 (en) * 2006-09-22 2010-10-21 Harris Global Communications, Inc. Adaptive peak power management of load devices sharing a power source
GB2455347B (en) * 2007-12-07 2012-04-11 Virtensys Ltd Control path I/O virtualisation
US8719471B2 (en) * 2008-12-05 2014-05-06 Advanced Fusion Technologies Method and system for enhanced interconnectivity in vessel computers
TWI489296B (zh) * 2013-05-17 2015-06-21 Wistron Corp 電腦
CN105933368A (zh) * 2015-12-24 2016-09-07 中国银联股份有限公司 一种用户行为数据上载方法及装置
JP2021099555A (ja) * 2019-12-19 2021-07-01 株式会社日立製作所 ストレージシステム及びコントローラ配置方法

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4371932A (en) * 1979-07-30 1983-02-01 International Business Machines Corp. I/O Controller for transferring data between a host processor and multiple I/O units
JPS61166668A (ja) * 1985-01-19 1986-07-28 Panafacom Ltd 多重プロセツサ制御方式
JPS6243766A (ja) * 1985-08-21 1987-02-25 Hitachi Ltd 共用資源の状態管理方式
JPH0750950B2 (ja) * 1988-08-03 1995-05-31 日本電信電話株式会社 時分割スイッチ
JPH0340046A (ja) * 1989-07-06 1991-02-20 Hitachi Ltd キャッシュメモリ制御方式および情報処理装置
JPH03113690A (ja) * 1989-09-28 1991-05-15 Toshiba Corp 情報処理装置
JPH0765036A (ja) * 1993-08-27 1995-03-10 Towa Electron Kk 電子出版
US5701450A (en) * 1994-02-25 1997-12-23 Seagate Technology, Inc. System including ATA sequencer microprocessor which executes sequencer instructions to handle plurality of real-time events allowing to perform all operations without local microprocessor intervention
US5392280A (en) * 1994-04-07 1995-02-21 Mitsubishi Electric Research Laboratories, Inc. Data transmission system and scheduling protocol for connection-oriented packet or cell switching networks
JPH08328772A (ja) * 1995-05-29 1996-12-13 Tec Corp プリンタ切換装置
JPH1125008A (ja) * 1997-07-03 1999-01-29 Fuji Xerox Co Ltd データ転送制御装置およびデータ転送制御方法
US6192433B1 (en) * 1998-07-14 2001-02-20 Tandem Computers Incorporated Automatic SCSI termination readjustment
US6289369B1 (en) * 1998-08-25 2001-09-11 International Business Machines Corporation Affinity, locality, and load balancing in scheduling user program-level threads for execution by a computer system
GB2350212B (en) * 1999-02-09 2003-10-08 Adder Tech Ltd Data routing device and system
US6693906B1 (en) * 2000-07-17 2004-02-17 Advanced Micro Devices, Inc. Apparatus and method for buffer-free evaluation of packet data bytes with multiple min terms
JP2002116927A (ja) * 2000-10-11 2002-04-19 Matsushita Electric Ind Co Ltd 光ディスクシミュレーション装置
JP2002132452A (ja) * 2000-10-24 2002-05-10 Ricoh Co Ltd データ記録装置とデータ記録システムとデータ記録方法
JP4821042B2 (ja) * 2000-10-31 2011-11-24 ソニー株式会社 データ変換装置、記憶装置、プロトコル変換装置、デバイス制御装置、記録再生システム、及び記録再生方法
JP2003122463A (ja) * 2001-10-12 2003-04-25 Fujitsu Ltd バス分割システム
US7065707B2 (en) * 2002-06-24 2006-06-20 Microsoft Corporation Segmenting and indexing web pages using function-based object models
JP4002210B2 (ja) * 2003-05-13 2007-10-31 日本電信電話株式会社 入力・クロスポイントバッファ型スイッチおよびそのスケジューリング方法

Also Published As

Publication number Publication date
JP5026672B2 (ja) 2012-09-12
CN1658142A (zh) 2005-08-24
CA2496063A1 (en) 2005-08-18
US20060023574A1 (en) 2006-02-02
KR20060041899A (ko) 2006-05-12
EP1566737B1 (de) 2009-02-04
ATE422261T1 (de) 2009-02-15
EP1566737A1 (de) 2005-08-24
CN100504745C (zh) 2009-06-24
CA2496063C (en) 2011-06-07
JP2005235219A (ja) 2005-09-02
US7546396B2 (en) 2009-06-09
KR101135705B1 (ko) 2012-04-13

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Legal Events

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8364 No opposition during term of opposition