DE602004016728D1 - Floating-gate-analogspannungsrückkopplungsschaltung - Google Patents

Floating-gate-analogspannungsrückkopplungsschaltung

Info

Publication number
DE602004016728D1
DE602004016728D1 DE602004016728T DE602004016728T DE602004016728D1 DE 602004016728 D1 DE602004016728 D1 DE 602004016728D1 DE 602004016728 T DE602004016728 T DE 602004016728T DE 602004016728 T DE602004016728 T DE 602004016728T DE 602004016728 D1 DE602004016728 D1 DE 602004016728D1
Authority
DE
Germany
Prior art keywords
feedback circuit
floating
floating gate
analog voltage
voltage feedback
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602004016728T
Other languages
English (en)
Inventor
William Owen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xicor LLC
Original Assignee
Xicor LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xicor LLC filed Critical Xicor LLC
Publication of DE602004016728D1 publication Critical patent/DE602004016728D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/005—Electric analogue stores, e.g. for storing instantaneous values with non-volatile charge storage, e.g. on floating gate or MNOS
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells

Landscapes

  • Read Only Memory (AREA)
  • Amplifiers (AREA)
  • Electronic Switches (AREA)
  • Non-Volatile Memory (AREA)
DE602004016728T 2003-01-21 2004-01-20 Floating-gate-analogspannungsrückkopplungsschaltung Expired - Lifetime DE602004016728D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/348,929 US6870764B2 (en) 2003-01-21 2003-01-21 Floating gate analog voltage feedback circuit
PCT/US2004/001608 WO2004066502A2 (en) 2003-01-21 2004-01-20 Floating gate analog voltage feedback circuit

Publications (1)

Publication Number Publication Date
DE602004016728D1 true DE602004016728D1 (de) 2008-11-06

Family

ID=32712657

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004016728T Expired - Lifetime DE602004016728D1 (de) 2003-01-21 2004-01-20 Floating-gate-analogspannungsrückkopplungsschaltung

Country Status (7)

Country Link
US (1) US6870764B2 (de)
EP (1) EP1588374B1 (de)
JP (1) JP4629653B2 (de)
CN (1) CN1739163B (de)
AT (1) ATE409349T1 (de)
DE (1) DE602004016728D1 (de)
WO (1) WO2004066502A2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010079977A (ja) * 2008-09-25 2010-04-08 Toppan Printing Co Ltd 定電流型電源回路を有する不揮発性半導体メモリ装置
JP2011187104A (ja) * 2010-03-05 2011-09-22 Renesas Electronics Corp 不揮発性半導体記憶装置及び不揮発性半導体記憶装置の制御方法
US10303998B2 (en) 2017-09-28 2019-05-28 International Business Machines Corporation Floating gate for neural network inference
US10782420B2 (en) 2017-12-18 2020-09-22 Thermo Eberline Llc Range-extended dosimeter
US10692570B2 (en) * 2018-07-11 2020-06-23 Sandisk Technologies Llc Neural network matrix multiplication in memory cells

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5059920A (en) * 1988-12-09 1991-10-22 Synaptics, Incorporated CMOS amplifier with offset adaptation
US4935702A (en) * 1988-12-09 1990-06-19 Synaptics, Inc. Subthreshold CMOS amplifier with offset adaptation
US4980859A (en) * 1989-04-07 1990-12-25 Xicor, Inc. NOVRAM cell using two differential decouplable nonvolatile memory elements
US4953928A (en) * 1989-06-09 1990-09-04 Synaptics Inc. MOS device for long-term learning
US5095284A (en) * 1990-09-10 1992-03-10 Synaptics, Incorporated Subthreshold CMOS amplifier with wide input voltage range
US5166562A (en) * 1991-05-09 1992-11-24 Synaptics, Incorporated Writable analog reference voltage storage device
US5875126A (en) * 1995-09-29 1999-02-23 California Institute Of Technology Autozeroing floating gate amplifier
FR2750240B1 (fr) * 1996-06-20 1998-07-31 Sgs Thomson Microelectronics Generateur de reference de tension
ITTO980068A1 (it) * 1998-01-27 1999-07-27 Sgs Thomson Microelectronics Circuito di lettura per memorie non volatili analogiche, in particola- re flash-eeprom, a lettura diretta della tensione di soglia e a corren
JP3139542B2 (ja) * 1998-01-28 2001-03-05 日本電気株式会社 参照電圧発生回路
JPH11297860A (ja) * 1998-03-26 1999-10-29 Newcore Technol Inc 半導体記憶装置
JPH11306775A (ja) * 1998-04-17 1999-11-05 Tadahiro Omi 半導体メモリ装置
US6297689B1 (en) * 1999-02-03 2001-10-02 National Semiconductor Corporation Low temperature coefficient low power programmable CMOS voltage reference
JP3933817B2 (ja) * 1999-06-24 2007-06-20 富士通株式会社 不揮発性メモリ回路
US6292399B1 (en) * 2000-07-03 2001-09-18 Advanced Micro Devices, Inc. Method and low-power circuits used to generate accurate drain voltage for flash memory core cells in read mode
US6898123B2 (en) * 2003-01-07 2005-05-24 Intersil Americas Inc. Differential dual floating gate circuit and method for programming

Also Published As

Publication number Publication date
JP2006517325A (ja) 2006-07-20
WO2004066502A3 (en) 2004-12-09
WO2004066502A2 (en) 2004-08-05
EP1588374A4 (de) 2006-04-05
ATE409349T1 (de) 2008-10-15
JP4629653B2 (ja) 2011-02-09
US6870764B2 (en) 2005-03-22
CN1739163B (zh) 2011-06-08
EP1588374B1 (de) 2008-09-24
CN1739163A (zh) 2006-02-22
EP1588374A2 (de) 2005-10-26
US20040141371A1 (en) 2004-07-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition