TW200633388A - A gate oxide protected I/O circuit - Google Patents

A gate oxide protected I/O circuit

Info

Publication number
TW200633388A
TW200633388A TW094107259A TW94107259A TW200633388A TW 200633388 A TW200633388 A TW 200633388A TW 094107259 A TW094107259 A TW 094107259A TW 94107259 A TW94107259 A TW 94107259A TW 200633388 A TW200633388 A TW 200633388A
Authority
TW
Taiwan
Prior art keywords
transistor
coupled
output
clamping
gate
Prior art date
Application number
TW094107259A
Other languages
Chinese (zh)
Other versions
TWI290795B (en
Inventor
Dar-Woei Wang
Yi-Heng Liu
Original Assignee
Elite Semiconductor Esmt
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elite Semiconductor Esmt filed Critical Elite Semiconductor Esmt
Priority to TW94107259A priority Critical patent/TWI290795B/en
Publication of TW200633388A publication Critical patent/TW200633388A/en
Application granted granted Critical
Publication of TWI290795B publication Critical patent/TWI290795B/en

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  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

An integrated circuit comprises a first input node and a second input node, an output node; a first output transistor of a first type and a second output transistor of a second type, and a first clamping transistor of the second type and a second clamping transistor of the second type. The first clamping transistor, the first output transistor, the second clamping transistor, and the second output transistor are coupled in series across a first power supply terminal and a second power supply terminal. The first input node is coupled to a gate of the first output transistor. The second input node is coupled to a gate of the second output transistor. The output node is coupled to a common node of the first output transistor and the second clamping transistor. A gate of the first clamping transistor is coupled to a first reference voltage. A gate of the second clamping transistor is coupled to a second reference voltage.
TW94107259A 2005-03-10 2005-03-10 A gate oxide protected I/O circuit TWI290795B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW94107259A TWI290795B (en) 2005-03-10 2005-03-10 A gate oxide protected I/O circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW94107259A TWI290795B (en) 2005-03-10 2005-03-10 A gate oxide protected I/O circuit

Publications (2)

Publication Number Publication Date
TW200633388A true TW200633388A (en) 2006-09-16
TWI290795B TWI290795B (en) 2007-12-01

Family

ID=39327598

Family Applications (1)

Application Number Title Priority Date Filing Date
TW94107259A TWI290795B (en) 2005-03-10 2005-03-10 A gate oxide protected I/O circuit

Country Status (1)

Country Link
TW (1) TWI290795B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113468089A (en) * 2021-09-03 2021-10-01 上海类比半导体技术有限公司 Output driving circuit and GPIO circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7350644B2 (en) * 2019-12-04 2023-09-26 キオクシア株式会社 Output circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113468089A (en) * 2021-09-03 2021-10-01 上海类比半导体技术有限公司 Output driving circuit and GPIO circuit

Also Published As

Publication number Publication date
TWI290795B (en) 2007-12-01

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