DE602004009284D1 - Systeme und Verfahren um automatisch generiertes Testmuster zu verarbeiten - Google Patents
Systeme und Verfahren um automatisch generiertes Testmuster zu verarbeitenInfo
- Publication number
- DE602004009284D1 DE602004009284D1 DE602004009284T DE602004009284T DE602004009284D1 DE 602004009284 D1 DE602004009284 D1 DE 602004009284D1 DE 602004009284 T DE602004009284 T DE 602004009284T DE 602004009284 T DE602004009284 T DE 602004009284T DE 602004009284 D1 DE602004009284 D1 DE 602004009284D1
- Authority
- DE
- Germany
- Prior art keywords
- systems
- methods
- automatically generated
- test patterns
- process automatically
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31919—Storing and outputting test patterns
- G01R31/31921—Storing and outputting test patterns using compression techniques, e.g. patterns sequencer
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US818101 | 2004-04-05 | ||
US10/818,101 US7386777B2 (en) | 2004-04-05 | 2004-04-05 | Systems and methods for processing automatically generated test patterns |
Publications (2)
Publication Number | Publication Date |
---|---|
DE602004009284D1 true DE602004009284D1 (de) | 2007-11-15 |
DE602004009284T2 DE602004009284T2 (de) | 2008-08-21 |
Family
ID=34912679
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602004009284T Active DE602004009284T2 (de) | 2004-04-05 | 2004-11-18 | Systeme und Verfahren um automatisch generiertes Testmuster zu verarbeiten |
Country Status (4)
Country | Link |
---|---|
US (1) | US7386777B2 (de) |
EP (1) | EP1584937B1 (de) |
JP (1) | JP2005292126A (de) |
DE (1) | DE602004009284T2 (de) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2375695B (en) * | 2001-05-19 | 2004-08-25 | At & T Lab Cambridge Ltd | Improved power efficency in microprocessors |
WO2004017597A1 (en) * | 2002-08-14 | 2004-02-26 | Nokia Corporation | Layered compression architecture for multi-hop header compression |
JP4279751B2 (ja) * | 2004-08-23 | 2009-06-17 | 株式会社アドバンテスト | デバイスの試験装置及び試験方法 |
KR100708462B1 (ko) * | 2005-05-27 | 2007-04-18 | 연세대학교 산학협력단 | 천이감시 윈도우를 이용한 lfsr 천이수 감소방법 및 그장치 |
US7412636B2 (en) * | 2005-08-23 | 2008-08-12 | Oc Applications Research Llc | Scan string segmentation for digital test compression |
GB2435334A (en) * | 2006-02-20 | 2007-08-22 | Graeme Roy Smith | Compression and decompression of data stream using a linear feedback shift register |
US7730373B2 (en) * | 2006-09-12 | 2010-06-01 | Nec Laboratories America, Inc. | Test data compression method for system-on-chip using linear-feedback shift register reseeding |
TWI312075B (en) * | 2006-11-30 | 2009-07-11 | Ind Tech Res Inst | Scan test data compression method and decoding apparatus for multiple-scan-chain designs |
SE531398C2 (sv) | 2007-02-16 | 2009-03-24 | Scalado Ab | Generering av en dataström och identifiering av positioner inuti en dataström |
SE533185C2 (sv) | 2007-02-16 | 2010-07-13 | Scalado Ab | Metod för behandling av en digital bild samt bildrepresentationsformat |
US20080270848A1 (en) * | 2007-04-26 | 2008-10-30 | Carli Connally | Method and Apparatus for Displaying Pin Result Data |
US20100077211A1 (en) * | 2008-09-24 | 2010-03-25 | Apple Inc. | Bit-error rate tester with pattern generation |
TWI403746B (zh) * | 2008-10-22 | 2013-08-01 | 國立臺灣大學 | 測試圖案最佳化的方法 |
US8214170B2 (en) * | 2009-01-15 | 2012-07-03 | International Business Machines Corporation | Test pattern compression |
KR20100099428A (ko) * | 2009-03-03 | 2010-09-13 | 삼성전자주식회사 | 단말기 간 자동 동작 제어 방법 및 이를 지원하는 단말기 |
CN101692117B (zh) * | 2009-09-16 | 2012-04-18 | 上海电力学院 | 一种低功耗激励产生系统 |
JP2011089833A (ja) * | 2009-10-21 | 2011-05-06 | Renesas Electronics Corp | 半導体装置ならびに半導体装置のテストパターン生成方法 |
CN101762782B (zh) * | 2010-01-13 | 2012-11-14 | 詹文法 | 系统芯片外建自测试数据的压缩方法及专用解码单元 |
US8077063B2 (en) | 2010-01-18 | 2011-12-13 | Freescale Semiconductor, Inc. | Method and system for determining bit stream zone statistics |
US8718998B2 (en) * | 2011-03-17 | 2014-05-06 | Apple Inc. | Identifying initial don't care memory elements for simulation |
EP2597573B1 (de) * | 2011-11-28 | 2018-08-29 | Tata Consultancy Services Limited | Testdatenerzeugung |
US9311201B2 (en) | 2012-08-22 | 2016-04-12 | International Business Machines Corporation | Real-time rule engine for adaptive testing of integrated circuits |
US8972806B2 (en) * | 2012-10-18 | 2015-03-03 | Applied Micro Circuits Corporation | Self-test design for serializer / deserializer testing |
US9274911B2 (en) | 2013-02-21 | 2016-03-01 | Advantest Corporation | Using shared pins in a concurrent test execution environment |
US9514844B2 (en) | 2014-08-26 | 2016-12-06 | Globalfoundries Inc. | Fast auto shift of failing memory diagnostics data using pattern detection |
CN113391184A (zh) * | 2020-03-11 | 2021-09-14 | 长鑫存储技术有限公司 | 控制芯片的测试方法及相关设备 |
CN113393892A (zh) * | 2020-03-11 | 2021-09-14 | 长鑫存储技术有限公司 | 控制芯片的测试方法及相关设备 |
US20230153422A1 (en) * | 2021-11-18 | 2023-05-18 | Rocksavage Technology, Inc. | Method, System and Apparatus for Detecting Malicious Modifications to Semiconductor Devices |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4679094A (en) * | 1986-10-14 | 1987-07-07 | The Associated Press | Method for compression and transmission of video information |
EP0460352B1 (de) * | 1990-06-07 | 1995-11-02 | International Business Machines Corporation | System zur Reduzierung von Prüfdatenspeichern |
DE4305442C2 (de) * | 1993-02-23 | 1999-08-05 | Hewlett Packard Gmbh | Verfahren und Vorrichtung zum Erzeugen eines Testvektors |
US5991909A (en) * | 1996-10-15 | 1999-11-23 | Mentor Graphics Corporation | Parallel decompressor and related methods and apparatuses |
US6661839B1 (en) * | 1998-03-24 | 2003-12-09 | Advantest Corporation | Method and device for compressing and expanding data pattern |
US6684358B1 (en) * | 1999-11-23 | 2004-01-27 | Janusz Rajski | Decompressor/PRPG for applying pseudo-random and deterministic test patterns |
US6327687B1 (en) * | 1999-11-23 | 2001-12-04 | Janusz Rajski | Test pattern compression for an integrated circuit test environment |
US6757323B1 (en) * | 2000-05-16 | 2004-06-29 | Robert Alan Fleming | Rapid signal acquisition by spread spectrum transceivers |
US20020093356A1 (en) * | 2000-11-30 | 2002-07-18 | Williams Thomas W. | Intelligent test vector formatting to reduce test vector size and allow encryption thereof for integrated circuit testing |
US6732312B2 (en) * | 2001-03-09 | 2004-05-04 | Agilent Technologies, Inc. | Test vector compression method |
JP2002350516A (ja) * | 2001-05-23 | 2002-12-04 | Ando Electric Co Ltd | Icテスタ、icテスト方法、icテストプログラムおよびicテストプログラムを記録した記録媒体 |
US6950974B1 (en) * | 2001-09-07 | 2005-09-27 | Synopsys Inc. | Efficient compression and application of deterministic patterns in a logic BIST architecture |
JP2003121499A (ja) * | 2001-10-09 | 2003-04-23 | Hitachi Ltd | 組込みテスト機能付き半導体集積回路、テストコード生成プログラムから成る電子設計データを保存する記憶媒体、該半導体集積回路のテスト方法、テストコード生成自動化方法及びそのプログラム |
JP2003296104A (ja) * | 2002-04-05 | 2003-10-17 | Hitachi Ltd | プロセッサおよびアセンブラ/コンパイラ |
JP4031954B2 (ja) * | 2002-06-11 | 2008-01-09 | 富士通株式会社 | 集積回路の診断装置および診断方法 |
US7131046B2 (en) * | 2002-12-03 | 2006-10-31 | Verigy Ipco | System and method for testing circuitry using an externally generated signature |
US7188286B2 (en) * | 2003-01-24 | 2007-03-06 | On-Chip Technologies, Inc. | Accelerated scan circuitry and method for reducing scan test data volume and execution time |
-
2004
- 2004-04-05 US US10/818,101 patent/US7386777B2/en not_active Expired - Fee Related
- 2004-11-18 DE DE602004009284T patent/DE602004009284T2/de active Active
- 2004-11-18 EP EP04027455A patent/EP1584937B1/de not_active Expired - Fee Related
-
2005
- 2005-03-09 JP JP2005065444A patent/JP2005292126A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
DE602004009284T2 (de) | 2008-08-21 |
US7386777B2 (en) | 2008-06-10 |
EP1584937B1 (de) | 2007-10-03 |
US20050229062A1 (en) | 2005-10-13 |
JP2005292126A (ja) | 2005-10-20 |
EP1584937A1 (de) | 2005-10-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8327 | Change in the person/name/address of the patent owner |
Owner name: VERIGY (SINGAPORE) PTE. LTD., SINGAPORE, SG |
|
8328 | Change in the person/name/address of the agent |
Representative=s name: SCHOPPE, ZIMMERMANN, STOECKELER & ZINKLER, 82049 P |
|
8364 | No opposition during term of opposition | ||
R082 | Change of representative |
Ref document number: 1584937 Country of ref document: EP Representative=s name: SCHOPPE, ZIMMERMANN, STOECKELER, ZINKLER & PARTNER |