DE60122145D1 - Verfahren zur herstellung einer elektronischen komponente mit selbstjustierten source, drain und gate in damaszen-technologie - Google Patents
Verfahren zur herstellung einer elektronischen komponente mit selbstjustierten source, drain und gate in damaszen-technologieInfo
- Publication number
- DE60122145D1 DE60122145D1 DE60122145T DE60122145T DE60122145D1 DE 60122145 D1 DE60122145 D1 DE 60122145D1 DE 60122145 T DE60122145 T DE 60122145T DE 60122145 T DE60122145 T DE 60122145T DE 60122145 D1 DE60122145 D1 DE 60122145D1
- Authority
- DE
- Germany
- Prior art keywords
- damascen
- drain
- gate
- self
- producing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76888—By rendering at least a portion of the conductor non conductive, e.g. oxidation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28088—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41775—Source or drain electrodes for field effect devices characterised by the proximity or the relative position of the source or drain electrode and the gate electrode, e.g. the source or drain electrode separated from the gate electrode by side-walls or spreading around or above the gate electrode
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0007419 | 2000-06-09 | ||
FR0007419A FR2810157B1 (fr) | 2000-06-09 | 2000-06-09 | Procede de realisation d'un composant electronique a source, drain et grille auto-allignes, en architecture damascene |
PCT/FR2001/001776 WO2001095383A1 (fr) | 2000-06-09 | 2001-06-08 | Procede de realisation d'un composant electronique a source, drain et grille auto-alignes, en architecture damascene. |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60122145D1 true DE60122145D1 (de) | 2006-09-21 |
DE60122145T2 DE60122145T2 (de) | 2007-07-05 |
Family
ID=8851147
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60122145T Expired - Lifetime DE60122145T2 (de) | 2000-06-09 | 2001-06-08 | Verfahren zur herstellung einer elektronischen komponente mit selbstjustierten source, drain und gate in damaszen-technologie |
Country Status (6)
Country | Link |
---|---|
US (1) | US6867128B2 (de) |
EP (1) | EP1292974B1 (de) |
JP (1) | JP2003536259A (de) |
DE (1) | DE60122145T2 (de) |
FR (1) | FR2810157B1 (de) |
WO (1) | WO2001095383A1 (de) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6674121B2 (en) * | 2001-12-14 | 2004-01-06 | The Regents Of The University Of California | Method and system for molecular charge storage field effect transistor |
US7186599B2 (en) * | 2004-01-12 | 2007-03-06 | Advanced Micro Devices, Inc. | Narrow-body damascene tri-gate FinFET |
US7056782B2 (en) * | 2004-02-25 | 2006-06-06 | International Business Machines Corporation | CMOS silicide metal gate integration |
KR100672153B1 (ko) * | 2005-05-25 | 2007-01-19 | 주식회사 하이닉스반도체 | 텅스텐 게이트 전극을 갖는 반도체 소자의 제조방법 |
JP2006344804A (ja) * | 2005-06-09 | 2006-12-21 | Seiko Epson Corp | 半導体装置および半導体装置の製造方法 |
FR2902234B1 (fr) * | 2006-06-12 | 2008-10-10 | Commissariat Energie Atomique | PROCEDE DE REALISATION DE ZONES A BASE DE Si1-yGey DE DIFFERENTES TENEURS EN Ge SUR UN MEME SUBSTRAT PAR CONDENSATION DE GERMANIUM |
DE602007000665D1 (de) * | 2006-06-12 | 2009-04-23 | St Microelectronics Sa | Verfahren zur Herstellung von auf Si1-yGey basierenden Zonen mit unterschiedlichen Ge-Gehalten auf ein und demselben Substrat mittels Kondensation von Germanium |
US8455268B2 (en) * | 2007-08-31 | 2013-06-04 | Spansion Llc | Gate replacement with top oxide regrowth for the top oxide improvement |
US20090218627A1 (en) * | 2008-02-28 | 2009-09-03 | International Business Machines Corporation | Field effect device structure including self-aligned spacer shaped contact |
FR2931294B1 (fr) | 2008-05-13 | 2010-09-03 | Commissariat Energie Atomique | Procede de realisation d'un transistor a source et drain metalliques |
FR2947384B1 (fr) | 2009-06-25 | 2012-03-30 | Commissariat Energie Atomique | Procede de realisation d'un transistor a source et drain metalliques |
US8294202B2 (en) * | 2009-07-08 | 2012-10-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Metal gate structure of a semiconductor device |
US8436404B2 (en) | 2009-12-30 | 2013-05-07 | Intel Corporation | Self-aligned contacts |
DE102010028460B4 (de) * | 2010-04-30 | 2014-01-23 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Verfahren zum Herstellen eines Halbleiterbauelements mit einer reduzierten Defektrate in Kontakten, das Austauschgateelektrodenstrukturen unter Anwendung einer Zwischendeckschicht aufweist |
KR101815527B1 (ko) | 2010-10-07 | 2018-01-05 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
US8536656B2 (en) * | 2011-01-10 | 2013-09-17 | International Business Machines Corporation | Self-aligned contacts for high k/metal gate process flow |
US8785322B2 (en) * | 2011-01-31 | 2014-07-22 | International Business Machines Corporation | Devices and methods to optimize materials and properties for replacement metal gate structures |
DE102011004323B4 (de) * | 2011-02-17 | 2016-02-25 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Halbleiterbauelement mit selbstjustierten Kontaktelementen und Verfahren zu seiner Herstellung |
CN103311282B (zh) * | 2012-03-14 | 2016-08-10 | 中国科学院微电子研究所 | 半导体器件及其制造方法 |
KR101929185B1 (ko) | 2012-05-02 | 2018-12-17 | 삼성전자 주식회사 | 반도체 장치의 제조 방법 |
CN103681324B (zh) * | 2012-08-30 | 2016-12-21 | 中芯国际集成电路制造(上海)有限公司 | Mos晶体管的制作方法 |
US8896030B2 (en) | 2012-09-07 | 2014-11-25 | Intel Corporation | Integrated circuits with selective gate electrode recess |
US20140073106A1 (en) | 2012-09-12 | 2014-03-13 | International Business Machines Corporation | Lateral bipolar transistor and cmos hybrid technology |
CN103681264B (zh) * | 2012-09-26 | 2016-11-23 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件的形成方法以及mos晶体管的形成方法 |
US9129854B2 (en) * | 2012-10-04 | 2015-09-08 | Sandisk Technologies Inc. | Full metal gate replacement process for NAND flash memory |
US9087796B2 (en) | 2013-02-26 | 2015-07-21 | International Business Machines Corporation | Semiconductor fabrication method using stop layer |
CN104752215B (zh) * | 2013-12-30 | 2017-12-29 | 中芯国际集成电路制造(上海)有限公司 | 晶体管的形成方法 |
US9349817B2 (en) * | 2014-02-03 | 2016-05-24 | Taiwan Semiconductor Manufacturing Co., Ltd | Semiconductor device including spacers having different dimensions |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5391510A (en) * | 1992-02-28 | 1995-02-21 | International Business Machines Corporation | Formation of self-aligned metal gate FETs using a benignant removable gate material during high temperature steps |
FR2750534B1 (fr) * | 1996-06-27 | 1998-08-28 | Commissariat Energie Atomique | Transistor et procede de realisation d'un transistor a contacts et a isolation de champ auto-alignes |
FR2757312B1 (fr) * | 1996-12-16 | 1999-01-08 | Commissariat Energie Atomique | Transistor mis a grille metallique auto-alignee et son procede de fabrication |
US5960270A (en) * | 1997-08-11 | 1999-09-28 | Motorola, Inc. | Method for forming an MOS transistor having a metallic gate electrode that is formed after the formation of self-aligned source and drain regions |
US5955759A (en) * | 1997-12-11 | 1999-09-21 | International Business Machines Corporation | Reduced parasitic resistance and capacitance field effect transistor |
JP3175700B2 (ja) * | 1998-08-24 | 2001-06-11 | 日本電気株式会社 | メタルゲート電界効果トランジスタの製造方法 |
US6200865B1 (en) * | 1998-12-04 | 2001-03-13 | Advanced Micro Devices, Inc. | Use of sacrificial dielectric structure to form semiconductor device with a self-aligned threshold adjust and overlying low-resistance gate |
TW449919B (en) * | 1998-12-18 | 2001-08-11 | Koninkl Philips Electronics Nv | A method of manufacturing a semiconductor device |
US6033963A (en) * | 1999-08-30 | 2000-03-07 | Taiwan Semiconductor Manufacturing Company | Method of forming a metal gate for CMOS devices using a replacement gate process |
US6271094B1 (en) * | 2000-02-14 | 2001-08-07 | International Business Machines Corporation | Method of making MOSFET with high dielectric constant gate insulator and minimum overlap capacitance |
-
2000
- 2000-06-09 FR FR0007419A patent/FR2810157B1/fr not_active Expired - Lifetime
-
2001
- 2001-06-08 US US10/030,175 patent/US6867128B2/en not_active Expired - Lifetime
- 2001-06-08 EP EP01945378A patent/EP1292974B1/de not_active Expired - Lifetime
- 2001-06-08 DE DE60122145T patent/DE60122145T2/de not_active Expired - Lifetime
- 2001-06-08 JP JP2002502826A patent/JP2003536259A/ja active Pending
- 2001-06-08 WO PCT/FR2001/001776 patent/WO2001095383A1/fr active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
EP1292974A1 (de) | 2003-03-19 |
FR2810157A1 (fr) | 2001-12-14 |
US20030008496A1 (en) | 2003-01-09 |
FR2810157B1 (fr) | 2002-08-16 |
US6867128B2 (en) | 2005-03-15 |
EP1292974B1 (de) | 2006-08-09 |
DE60122145T2 (de) | 2007-07-05 |
JP2003536259A (ja) | 2003-12-02 |
WO2001095383A1 (fr) | 2001-12-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |