DE60106229D1 - Uv-verstärktes silylierungsverfahren zur erhöhung des ätzwiderstands von dünnen resistschichten - Google Patents

Uv-verstärktes silylierungsverfahren zur erhöhung des ätzwiderstands von dünnen resistschichten

Info

Publication number
DE60106229D1
DE60106229D1 DE60106229T DE60106229T DE60106229D1 DE 60106229 D1 DE60106229 D1 DE 60106229D1 DE 60106229 T DE60106229 T DE 60106229T DE 60106229 T DE60106229 T DE 60106229T DE 60106229 D1 DE60106229 D1 DE 60106229D1
Authority
DE
Germany
Prior art keywords
reinforced
increase
etch resistance
silylation process
thin resists
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60106229T
Other languages
English (en)
Other versions
DE60106229T2 (de
Inventor
Bharath Rangarajan
Ramkumar Subramanian
A Phan
Bhanwar Singh
K Templeton
K Yedur
K Choo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GlobalFoundries Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE60106229D1 publication Critical patent/DE60106229D1/de
Application granted granted Critical
Publication of DE60106229T2 publication Critical patent/DE60106229T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/265—Selective reaction with inorganic or organometallic reagents after image-wise exposure, e.g. silylation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • Organic Chemistry (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
DE60106229T 2000-05-01 2001-04-19 Ozon-verstärktes silylierungsverfahren zur erhöhung des ätzwiderstands von dünnen resistschichten Expired - Lifetime DE60106229T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/565,691 US6451512B1 (en) 2000-05-01 2000-05-01 UV-enhanced silylation process to increase etch resistance of ultra thin resists
US565691 2000-05-01
PCT/US2001/012897 WO2001084599A2 (en) 2000-05-01 2001-04-19 Uv-enhanced silylation process to increase etch resistance of ultra thin resists

Publications (2)

Publication Number Publication Date
DE60106229D1 true DE60106229D1 (de) 2004-11-11
DE60106229T2 DE60106229T2 (de) 2005-02-24

Family

ID=24259700

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60106229T Expired - Lifetime DE60106229T2 (de) 2000-05-01 2001-04-19 Ozon-verstärktes silylierungsverfahren zur erhöhung des ätzwiderstands von dünnen resistschichten

Country Status (6)

Country Link
US (3) US6451512B1 (de)
EP (1) EP1279072B1 (de)
AU (1) AU2001253735A1 (de)
DE (1) DE60106229T2 (de)
TW (1) TW498407B (de)
WO (1) WO2001084599A2 (de)

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US6451512B1 (en) * 2000-05-01 2002-09-17 Advanced Micro Devices, Inc. UV-enhanced silylation process to increase etch resistance of ultra thin resists
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JP2002163005A (ja) * 2000-11-29 2002-06-07 Nikon Corp 制御系の設計方法、制御系、制御系の調整方法及び露光方法
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KR100480611B1 (ko) * 2002-08-14 2005-03-31 삼성전자주식회사 기상 실릴레이션을 이용한 반도체 소자의 미세 패턴 형성방법
CN1742363B (zh) * 2003-01-25 2010-10-13 霍尼韦尔国际公司 受损电介质材料和电介质膜的修复和恢复
US7709371B2 (en) * 2003-01-25 2010-05-04 Honeywell International Inc. Repairing damage to low-k dielectric materials using silylating agents
KR100680944B1 (ko) * 2003-05-27 2007-02-08 주식회사 하이닉스반도체 반도체 소자의 제조방법
US20040259371A1 (en) * 2003-06-18 2004-12-23 Zhijian Lu Reduction of resist defects
US7425505B2 (en) * 2003-07-23 2008-09-16 Fsi International, Inc. Use of silyating agents
US8475666B2 (en) * 2004-09-15 2013-07-02 Honeywell International Inc. Method for making toughening agent materials
US20050118541A1 (en) * 2003-11-28 2005-06-02 Applied Materials, Inc. Maintenance of photoresist adhesion and activity on the surface of dielectric ARCS for 90 nm feature sizes
CN100361275C (zh) * 2004-10-12 2008-01-09 联华电子股份有限公司 蚀刻工艺以及图案化工艺
US7678712B2 (en) * 2005-03-22 2010-03-16 Honeywell International, Inc. Vapor phase treatment of dielectric materials
US7442649B2 (en) * 2005-03-29 2008-10-28 Lam Research Corporation Etch with photoresist mask
US7309659B1 (en) 2005-04-01 2007-12-18 Advanced Micro Devices, Inc. Silicon-containing resist to pattern organic low k-dielectrics
US20070087951A1 (en) * 2005-10-19 2007-04-19 Hynix Semiconductor Inc. Thinner composition for inhibiting photoresist from drying
US20080008973A1 (en) * 2006-07-10 2008-01-10 Tomohiro Goto Substrate processing method and substrate processing apparatus
JP4999419B2 (ja) * 2006-10-12 2012-08-15 東京エレクトロン株式会社 基板処理方法および基板処理システム、ならびにコンピュータ読取可能な記憶媒体
US7851138B2 (en) 2007-07-19 2010-12-14 Hitachi Global Storage Technologies, Netherlands, B.V. Patterning a surface comprising silicon and carbon
US20090174036A1 (en) * 2008-01-04 2009-07-09 International Business Machines Corporation Plasma curing of patterning materials for aggressively scaled features
JP5242508B2 (ja) * 2009-06-26 2013-07-24 東京エレクトロン株式会社 液処理装置、液処理方法および記憶媒体
JP5424848B2 (ja) * 2009-12-15 2014-02-26 株式会社東芝 半導体基板の表面処理装置及び方法
US8492170B2 (en) 2011-04-25 2013-07-23 Applied Materials, Inc. UV assisted silylation for recovery and pore sealing of damaged low K films
US8815752B2 (en) 2012-11-28 2014-08-26 Micron Technology, Inc. Methods of forming features in semiconductor device structures
US9291907B2 (en) 2012-05-18 2016-03-22 Micron Technology, Inc. Methods for forming resist features and arrays of aligned, elongate resist features
KR20170038988A (ko) 2015-09-30 2017-04-10 삼성디스플레이 주식회사 실란 커플링제 및 이를 이용한 와이어 그리드 패턴의 제조 방법
CN111065967B (zh) * 2017-09-29 2023-06-23 日本瑞翁株式会社 正型抗蚀剂组合物、抗蚀剂膜形成方法及层叠体的制造方法
US20190368040A1 (en) * 2018-06-01 2019-12-05 Asm Ip Holding B.V. Infiltration apparatus and methods of infiltrating an infiltrateable material
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TWI830502B (zh) * 2022-11-17 2024-01-21 家碩科技股份有限公司 自動量測光罩載具之流量的治具

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Also Published As

Publication number Publication date
AU2001253735A1 (en) 2001-11-12
EP1279072A2 (de) 2003-01-29
US6645702B1 (en) 2003-11-11
DE60106229T2 (de) 2005-02-24
US6451512B1 (en) 2002-09-17
WO2001084599A3 (en) 2002-07-18
US6746822B1 (en) 2004-06-08
WO2001084599A2 (en) 2001-11-08
TW498407B (en) 2002-08-11
EP1279072B1 (de) 2004-10-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: GLOBALFOUNDRIES INC., GRAND CAYMAN, KY

8328 Change in the person/name/address of the agent

Representative=s name: GRUENECKER, KINKELDEY, STOCKMAIR & SCHWANHAEUSSER,