DE3882882D1 - Verfahren zur herstellung einer siliziumstruktur auf einem isolator. - Google Patents
Verfahren zur herstellung einer siliziumstruktur auf einem isolator.Info
- Publication number
- DE3882882D1 DE3882882D1 DE8888420302T DE3882882T DE3882882D1 DE 3882882 D1 DE3882882 D1 DE 3882882D1 DE 8888420302 T DE8888420302 T DE 8888420302T DE 3882882 T DE3882882 T DE 3882882T DE 3882882 D1 DE3882882 D1 DE 3882882D1
- Authority
- DE
- Germany
- Prior art keywords
- isolator
- producing
- silicon structure
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02598—Microstructure monocrystalline
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76245—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using full isolation by porous oxide silicon, i.e. FIPOS techniques
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8712913A FR2620571B1 (fr) | 1987-09-11 | 1987-09-11 | Procede de fabrication d'une structure de silicium sur isolant |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3882882D1 true DE3882882D1 (de) | 1993-09-09 |
DE3882882T2 DE3882882T2 (de) | 1994-03-24 |
Family
ID=9355001
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE88420302T Expired - Fee Related DE3882882T2 (de) | 1987-09-11 | 1988-09-08 | Verfahren zur Herstellung einer Siliziumstruktur auf einem Isolator. |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0312466B1 (de) |
DE (1) | DE3882882T2 (de) |
FR (1) | FR2620571B1 (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3253099B2 (ja) * | 1990-03-27 | 2002-02-04 | キヤノン株式会社 | 半導体基板の作製方法 |
GB9025236D0 (en) * | 1990-11-20 | 1991-01-02 | Secr Defence | Silicon-on porous-silicon;method of production |
EP0536790B1 (de) * | 1991-10-11 | 2004-03-03 | Canon Kabushiki Kaisha | Verfahren zur Herstellung von Halbleiter-Produkten |
JP3250673B2 (ja) * | 1992-01-31 | 2002-01-28 | キヤノン株式会社 | 半導体素子基体とその作製方法 |
WO1999001893A2 (de) * | 1997-06-30 | 1999-01-14 | MAX-PLANCK-Gesellschaft zur Förderung der Wissenschaften e.V. | Verfahren zur herstellung von schichtartigen gebilden auf einem substrat, substrat sowie mittels des verfahrens hergestellte halbleiterbauelemente |
DE19841430A1 (de) * | 1998-09-10 | 2000-05-25 | Inst Physikalische Elektronik | Verfahren zur Herstellung kristalliner Halbleiterschichten |
FR2797093B1 (fr) * | 1999-07-26 | 2001-11-02 | France Telecom | Procede de realisation d'un dispositif comprenant un empilement de plans de boites quantiques sur un substrat de silicium ou germanium monocristallin |
DE10117363A1 (de) * | 2001-04-06 | 2002-10-17 | Infineon Technologies Ag | Verfahren zum Herstellen einer porösen Si0¶2¶-Scheibe |
FR2968316B1 (fr) * | 2010-12-01 | 2013-06-28 | Commissariat Energie Atomique | Procede de preparation d'une couche de silicium cristallise a gros grains |
-
1987
- 1987-09-11 FR FR8712913A patent/FR2620571B1/fr not_active Expired - Lifetime
-
1988
- 1988-09-08 DE DE88420302T patent/DE3882882T2/de not_active Expired - Fee Related
- 1988-09-08 EP EP88420302A patent/EP0312466B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE3882882T2 (de) | 1994-03-24 |
FR2620571B1 (fr) | 1990-01-12 |
EP0312466A1 (de) | 1989-04-19 |
FR2620571A1 (fr) | 1989-03-17 |
EP0312466B1 (de) | 1993-08-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE68902364T2 (de) | Verfahren zur herstellung einer oxiranverbindung. | |
DE3686125T2 (de) | Verfahren zur herstellung einer integrierten schaltung. | |
DE3686315T2 (de) | Verfahren zur herstellung einer halbleiterstruktur. | |
DE3887572T2 (de) | Verfahren zur Instandhaltung einer Netzstruktur-Datenbank. | |
DE3882412D1 (de) | Verfahren zur herstellung einer elektronischen vorrichtung. | |
AT372281B (de) | Verfahren zur herstellung einer nutriens-verbindung | |
DE3780795D1 (de) | Verfahren zur herstellung einer halbleiteranordnung vom typ "halbleiter auf isolator". | |
DE3788486T2 (de) | Verfahren zur Herstellung einer monolithischen Hochspannungshalbleiterschaltung. | |
DE68907507D1 (de) | Verfahren zur herstellung einer halbleitervorrichtung. | |
AT399634B (de) | Verfahren zur herstellung einer süssware | |
DE3582434D1 (de) | Verfahren zur herstellung eines halbleiters auf einem isolator. | |
DE3582143D1 (de) | Verfahren zur herstellung einer halbleitervorrichtung. | |
DE3689164D1 (de) | Verfahren zur Herstellung einer elastischen Form. | |
DE3779802T2 (de) | Verfahren zur herstellung einer halbleiteranordnung. | |
DE3882882D1 (de) | Verfahren zur herstellung einer siliziumstruktur auf einem isolator. | |
DE3484526D1 (de) | Verfahren zur herstellung einer halbleiteranordnung. | |
DE3580350D1 (de) | Verfahren zur herstellung einer frukto-oligosaccharose. | |
DE3486144T2 (de) | Verfahren zur herstellung einer halbleiteranordnung. | |
DE3578263D1 (de) | Verfahren zur herstellung einer halbleiteranordnung. | |
DE3668634D1 (de) | Verfahren zur herstellung phosphorhaltiger polyarylenaether. | |
DE3868669D1 (de) | Verfahren zur herstellung einer polyglycidylamin-verbindung. | |
DE3783799D1 (de) | Verfahren zur herstellung einer halbleiteranordnung. | |
DE3678191D1 (de) | Verfahren zur herstellung einer waermebehandelten prothetischen vorrichtung. | |
DE3667276D1 (de) | Verfahren zur herstellung einer azidosulfonylbenzoesaeure. | |
DE3784961D1 (de) | Verfahren zur herstellung einer verbindungsleitung. |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |