FR2797093B1 - Procede de realisation d'un dispositif comprenant un empilement de plans de boites quantiques sur un substrat de silicium ou germanium monocristallin - Google Patents

Procede de realisation d'un dispositif comprenant un empilement de plans de boites quantiques sur un substrat de silicium ou germanium monocristallin

Info

Publication number
FR2797093B1
FR2797093B1 FR9909646A FR9909646A FR2797093B1 FR 2797093 B1 FR2797093 B1 FR 2797093B1 FR 9909646 A FR9909646 A FR 9909646A FR 9909646 A FR9909646 A FR 9909646A FR 2797093 B1 FR2797093 B1 FR 2797093B1
Authority
FR
France
Prior art keywords
stack
producing
device including
crystal silicon
germanium substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9909646A
Other languages
English (en)
Other versions
FR2797093A1 (fr
Inventor
Daniel Bensahel
Yves Campidelli
Caroline Hernandez
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Orange SA
Original Assignee
France Telecom SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by France Telecom SA filed Critical France Telecom SA
Priority to FR9909646A priority Critical patent/FR2797093B1/fr
Priority to PCT/FR2000/002000 priority patent/WO2001008225A1/fr
Priority to EP00953226A priority patent/EP1198840A1/fr
Priority to US10/048,719 priority patent/US6690027B1/en
Publication of FR2797093A1 publication Critical patent/FR2797093A1/fr
Application granted granted Critical
Publication of FR2797093B1 publication Critical patent/FR2797093B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/34Materials of the light emitting region containing only elements of Group IV of the Periodic Table
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y20/00Nanooptics, e.g. quantum optics or photonic crystals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • H01L29/151Compositional structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/122Single quantum well structures
    • H01L29/127Quantum box structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/30Structure or shape of the active region; Materials used for the active region
    • H01S5/32Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
    • H01S5/3223IV compounds
    • H01S5/3224Si
    • H01S5/3227Si porous Si
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/30Structure or shape of the active region; Materials used for the active region
    • H01S5/34Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
    • H01S5/341Structures having reduced dimensionality, e.g. quantum wires
    • H01S5/3412Structures having reduced dimensionality, e.g. quantum wires quantum box or quantum dash

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biophysics (AREA)
  • Optics & Photonics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Vapour Deposition (AREA)
  • Led Devices (AREA)
  • Recrystallisation Techniques (AREA)
FR9909646A 1999-07-26 1999-07-26 Procede de realisation d'un dispositif comprenant un empilement de plans de boites quantiques sur un substrat de silicium ou germanium monocristallin Expired - Fee Related FR2797093B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR9909646A FR2797093B1 (fr) 1999-07-26 1999-07-26 Procede de realisation d'un dispositif comprenant un empilement de plans de boites quantiques sur un substrat de silicium ou germanium monocristallin
PCT/FR2000/002000 WO2001008225A1 (fr) 1999-07-26 2000-07-11 Procede de realisation d'un dispositif comprenant un empilement de plans de boites quantiques
EP00953226A EP1198840A1 (fr) 1999-07-26 2000-07-11 Procede de realisation d'un dispositif comprenant un empilement de plans de boites quantiques
US10/048,719 US6690027B1 (en) 1999-07-26 2000-07-11 Method for making a device comprising layers of planes of quantum dots

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9909646A FR2797093B1 (fr) 1999-07-26 1999-07-26 Procede de realisation d'un dispositif comprenant un empilement de plans de boites quantiques sur un substrat de silicium ou germanium monocristallin

Publications (2)

Publication Number Publication Date
FR2797093A1 FR2797093A1 (fr) 2001-02-02
FR2797093B1 true FR2797093B1 (fr) 2001-11-02

Family

ID=9548495

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9909646A Expired - Fee Related FR2797093B1 (fr) 1999-07-26 1999-07-26 Procede de realisation d'un dispositif comprenant un empilement de plans de boites quantiques sur un substrat de silicium ou germanium monocristallin

Country Status (4)

Country Link
US (1) US6690027B1 (fr)
EP (1) EP1198840A1 (fr)
FR (1) FR2797093B1 (fr)
WO (1) WO2001008225A1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AUPR919701A0 (en) * 2001-11-30 2001-12-20 Silverbrook Research Pty. Ltd. Method and apparatus (mems18)
WO2003067231A1 (fr) * 2002-02-07 2003-08-14 The Regents Of The University Of California Particules a codage optique
EP1341222A1 (fr) * 2002-02-28 2003-09-03 Interuniversitair Micro-Elektronica Centrum Méthode de fabrication d'un dispositif comprenant une couche semiconductrice sur un substrat à paramètre de maille non adapté
WO2005062865A2 (fr) * 2003-12-22 2005-07-14 The Regents Of The University Of California Particules optiquement codees a spectres de niveaux de gris
JP4203054B2 (ja) * 2005-08-16 2008-12-24 株式会社東芝 半導体膜の成膜方法
US8030664B2 (en) * 2006-12-15 2011-10-04 Samsung Led Co., Ltd. Light emitting device
TWI379430B (en) * 2009-04-16 2012-12-11 Atomic Energy Council A method of fabricating a thin interface for internal light reflection and impurities isolation

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2620571B1 (fr) * 1987-09-11 1990-01-12 France Etat Procede de fabrication d'une structure de silicium sur isolant
JP3352118B2 (ja) * 1992-08-25 2002-12-03 キヤノン株式会社 半導体装置及びその製造方法
US5293050A (en) * 1993-03-25 1994-03-08 International Business Machines Corporation Semiconductor quantum dot light emitting/detecting devices
DE4319413C2 (de) * 1993-06-14 1999-06-10 Forschungszentrum Juelich Gmbh Interferenzfilter oder dielektrischer Spiegel
US5685946A (en) * 1993-08-11 1997-11-11 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Method of producing buried porous silicon-geramanium layers in monocrystalline silicon lattices
GB9506735D0 (en) * 1995-03-31 1995-05-24 Univ Dundee Light emitters and detectors

Also Published As

Publication number Publication date
FR2797093A1 (fr) 2001-02-02
EP1198840A1 (fr) 2002-04-24
US6690027B1 (en) 2004-02-10
WO2001008225A1 (fr) 2001-02-01

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Legal Events

Date Code Title Description
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Effective date: 20070330