DE3882305T2 - Aktive dynamische Speicherzelle. - Google Patents
Aktive dynamische Speicherzelle.Info
- Publication number
- DE3882305T2 DE3882305T2 DE88307778T DE3882305T DE3882305T2 DE 3882305 T2 DE3882305 T2 DE 3882305T2 DE 88307778 T DE88307778 T DE 88307778T DE 3882305 T DE3882305 T DE 3882305T DE 3882305 T2 DE3882305 T2 DE 3882305T2
- Authority
- DE
- Germany
- Prior art keywords
- memory cell
- dynamic memory
- active dynamic
- active
- cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US9100587A | 1987-08-31 | 1987-08-31 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3882305D1 DE3882305D1 (de) | 1993-08-19 |
DE3882305T2 true DE3882305T2 (de) | 1993-10-21 |
Family
ID=22225313
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE88307778T Expired - Fee Related DE3882305T2 (de) | 1987-08-31 | 1988-08-23 | Aktive dynamische Speicherzelle. |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0306198B1 (de) |
JP (1) | JPS6472554A (de) |
KR (1) | KR910009452B1 (de) |
CA (1) | CA1322250C (de) |
DE (1) | DE3882305T2 (de) |
ES (1) | ES2041803T3 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5308783A (en) * | 1992-12-16 | 1994-05-03 | Siemens Aktiengesellschaft | Process for the manufacture of a high density cell array of gain memory cells |
TWI574259B (zh) | 2010-09-29 | 2017-03-11 | 半導體能源研究所股份有限公司 | 半導體記憶體裝置和其驅動方法 |
IT201800004982A1 (it) * | 2018-05-02 | 2019-11-02 | Francesco Vilardo | DRAM memory one bit all in one united in a single device |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4070653A (en) * | 1976-06-29 | 1978-01-24 | Texas Instruments Incorporated | Random access memory cell with ion implanted resistor element |
US4139785A (en) * | 1977-05-31 | 1979-02-13 | Texas Instruments Incorporated | Static memory cell with inverted field effect transistor |
US4168536A (en) * | 1977-06-30 | 1979-09-18 | International Business Machines Corporation | Capacitor memory with an amplified cell signal |
-
1988
- 1988-08-10 CA CA000574312A patent/CA1322250C/en not_active Expired - Fee Related
- 1988-08-16 JP JP63202819A patent/JPS6472554A/ja active Pending
- 1988-08-23 ES ES198888307778T patent/ES2041803T3/es not_active Expired - Lifetime
- 1988-08-23 DE DE88307778T patent/DE3882305T2/de not_active Expired - Fee Related
- 1988-08-23 EP EP88307778A patent/EP0306198B1/de not_active Expired - Lifetime
- 1988-08-30 KR KR1019880011028A patent/KR910009452B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
ES2041803T3 (es) | 1993-12-01 |
JPS6472554A (en) | 1989-03-17 |
EP0306198A2 (de) | 1989-03-08 |
KR890004435A (ko) | 1989-04-22 |
EP0306198A3 (en) | 1990-10-17 |
KR910009452B1 (ko) | 1991-11-16 |
EP0306198B1 (de) | 1993-07-14 |
DE3882305D1 (de) | 1993-08-19 |
CA1322250C (en) | 1993-09-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Free format text: BLUMBACH, KRAMER & PARTNER, 65193 WIESBADEN |
|
8339 | Ceased/non-payment of the annual fee |