DE3852222D1 - Nichtflüchtige RAM-Vorrichtung mit flüchtigen Speicherzellen. - Google Patents

Nichtflüchtige RAM-Vorrichtung mit flüchtigen Speicherzellen.

Info

Publication number
DE3852222D1
DE3852222D1 DE3852222T DE3852222T DE3852222D1 DE 3852222 D1 DE3852222 D1 DE 3852222D1 DE 3852222 T DE3852222 T DE 3852222T DE 3852222 T DE3852222 T DE 3852222T DE 3852222 D1 DE3852222 D1 DE 3852222D1
Authority
DE
Germany
Prior art keywords
volatile
memory cells
ram device
volatile memory
volatile ram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3852222T
Other languages
English (en)
Other versions
DE3852222T2 (de
Inventor
Hideki Arakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3852222D1 publication Critical patent/DE3852222D1/de
Publication of DE3852222T2 publication Critical patent/DE3852222T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
DE3852222T 1987-07-09 1988-06-30 Nichtflüchtige RAM-Vorrichtung mit flüchtigen Speicherzellen. Expired - Fee Related DE3852222T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62169678A JPS6414798A (en) 1987-07-09 1987-07-09 Non-volatile memory device

Publications (2)

Publication Number Publication Date
DE3852222D1 true DE3852222D1 (de) 1995-01-12
DE3852222T2 DE3852222T2 (de) 1995-04-06

Family

ID=15890878

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3852222T Expired - Fee Related DE3852222T2 (de) 1987-07-09 1988-06-30 Nichtflüchtige RAM-Vorrichtung mit flüchtigen Speicherzellen.

Country Status (5)

Country Link
US (1) US5029132A (de)
EP (1) EP0298657B1 (de)
JP (1) JPS6414798A (de)
KR (1) KR910007402B1 (de)
DE (1) DE3852222T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4858185A (en) * 1988-01-28 1989-08-15 National Semiconductor Corporation Zero power, electrically alterable, nonvolatile latch
GB8916019D0 (en) * 1989-07-13 1989-08-31 Hughes Microelectronics Ltd A non-volatile ram bit cell
US7149114B2 (en) * 2004-03-17 2006-12-12 Cypress Semiconductor Corp. Latch circuit and method for writing and reading volatile and non-volatile data to and from the latch
US20070007577A1 (en) * 2005-07-06 2007-01-11 Matrix Semiconductor, Inc. Integrated circuit embodying a non-volatile memory cell
US8072834B2 (en) 2005-08-25 2011-12-06 Cypress Semiconductor Corporation Line driver circuit and method with standby mode of operation
US7821859B1 (en) 2006-10-24 2010-10-26 Cypress Semiconductor Corporation Adaptive current sense amplifier with direct array access capability
US7859906B1 (en) 2007-03-30 2010-12-28 Cypress Semiconductor Corporation Circuit and method to increase read margin in non-volatile memories using a differential sensing circuit
US7881118B2 (en) * 2007-05-25 2011-02-01 Cypress Semiconductor Corporation Sense transistor protection for memory programming
US8107290B2 (en) * 2008-04-01 2012-01-31 The Regents Of The University Of Michigan Memory cell structure, a memory device employing such a memory cell structure, and an integrated circuit having such a memory device
KR101611416B1 (ko) * 2009-12-09 2016-04-12 삼성전자주식회사 비휘발성 논리 회로, 상기 비휘발성 논리 회로를 포함하는 집적 회로 및 상기 집적 회로의 동작 방법
JP6053474B2 (ja) * 2012-11-27 2016-12-27 株式会社フローディア 不揮発性半導体記憶装置
US9336872B2 (en) 2014-03-11 2016-05-10 Everspin Technologies, Inc. Nonvolatile logic and security circuits

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4630238A (en) * 1983-10-14 1986-12-16 Fujitsu Limited Semiconductor memory device
JPH0666394B2 (ja) * 1983-12-16 1994-08-24 富士通株式会社 半導体記憶装置
JPS61113189A (ja) * 1984-10-12 1986-05-31 Fujitsu Ltd 不揮発性ランダムアクセスメモリ装置
JPS61246995A (ja) * 1985-04-24 1986-11-04 Fujitsu Ltd 不揮発性ランダムアクセスメモリ装置
US4685083A (en) * 1985-10-03 1987-08-04 Thomson Components-Mostek Corporation Improved nonvolatile memory circuit using a dual node floating gate memory cell
JPS62217493A (ja) * 1986-02-27 1987-09-24 Fujitsu Ltd 半導体不揮発性記憶装置
JPS62256296A (ja) * 1986-04-30 1987-11-07 Fujitsu Ltd 半導体不揮発性記憶装置

Also Published As

Publication number Publication date
EP0298657B1 (de) 1994-11-30
EP0298657A2 (de) 1989-01-11
DE3852222T2 (de) 1995-04-06
KR890002889A (ko) 1989-04-11
KR910007402B1 (en) 1991-09-25
JPS6414798A (en) 1989-01-18
EP0298657A3 (en) 1990-10-31
US5029132A (en) 1991-07-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee