DE3851417D1 - Epitaxiales Wachstumsverfahren aus der Gasphase. - Google Patents

Epitaxiales Wachstumsverfahren aus der Gasphase.

Info

Publication number
DE3851417D1
DE3851417D1 DE3851417T DE3851417T DE3851417D1 DE 3851417 D1 DE3851417 D1 DE 3851417D1 DE 3851417 T DE3851417 T DE 3851417T DE 3851417 T DE3851417 T DE 3851417T DE 3851417 D1 DE3851417 D1 DE 3851417D1
Authority
DE
Germany
Prior art keywords
gas phase
epitaxial growth
growth process
epitaxial
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3851417T
Other languages
English (en)
Other versions
DE3851417T2 (de
Inventor
Yoshihiko Saito
Yoshiaki Matsushita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE3851417D1 publication Critical patent/DE3851417D1/de
Application granted granted Critical
Publication of DE3851417T2 publication Critical patent/DE3851417T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/0242Crystalline insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02576N-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02579P-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/2205Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/007Autodoping
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/025Deposition multi-step
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/169Vacuum deposition, e.g. including molecular beam epitaxy

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
DE3851417T 1987-12-18 1988-12-16 Epitaxiales Wachstumsverfahren aus der Gasphase. Expired - Fee Related DE3851417T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62320431A JPH01161826A (ja) 1987-12-18 1987-12-18 気相エピタキシャル成長法

Publications (2)

Publication Number Publication Date
DE3851417D1 true DE3851417D1 (de) 1994-10-13
DE3851417T2 DE3851417T2 (de) 1995-01-19

Family

ID=18121371

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3851417T Expired - Fee Related DE3851417T2 (de) 1987-12-18 1988-12-16 Epitaxiales Wachstumsverfahren aus der Gasphase.

Country Status (5)

Country Link
US (1) US4894349A (de)
EP (1) EP0320970B1 (de)
JP (1) JPH01161826A (de)
KR (1) KR930000609B1 (de)
DE (1) DE3851417T2 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0714840B2 (ja) * 1988-10-18 1995-02-22 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン エピタキシャル膜成長方法
US5024972A (en) * 1990-01-29 1991-06-18 Motorola, Inc. Deposition of a conductive layer for contacts
US5385850A (en) * 1991-02-07 1995-01-31 International Business Machines Corporation Method of forming a doped region in a semiconductor substrate utilizing a sacrificial epitaxial silicon layer
KR970009976B1 (ko) * 1991-08-26 1997-06-19 아메리칸 텔리폰 앤드 텔레그라프 캄파니 증착된 반도체상에 형성된 개선된 유전체
US5279987A (en) * 1991-10-31 1994-01-18 International Business Machines Corporation Fabricating planar complementary patterned subcollectors with silicon epitaxial layer
EP0592227A3 (de) * 1992-10-07 1995-01-11 Sharp Kk Herstellung eines Dünnfilm-Transistors und Produktion einer Flüssigkristalanzeige-Vorrichtung.
US5674766A (en) * 1994-12-30 1997-10-07 Siliconix Incorporated Method of making a trench MOSFET with multi-resistivity drain to provide low on-resistance by varying dopant concentration in epitaxial layer
DE69632175T2 (de) * 1995-08-31 2004-09-02 Texas Instruments Inc., Dallas Herstellungsverfahren einer epitaktischen Schicht mit minimaler Selbstdotierung
US6010937A (en) * 1995-09-05 2000-01-04 Spire Corporation Reduction of dislocations in a heteroepitaxial semiconductor structure
KR100249163B1 (ko) * 1996-12-20 2000-03-15 김영환 에피막형성방법
JPH1116838A (ja) * 1997-06-24 1999-01-22 Nec Corp 多結晶シリコン膜の成長方法およびcvd装置
US6033950A (en) * 1998-04-10 2000-03-07 Taiwan Semiconductor Manufacturing Company, Ltd. Dual layer poly deposition to prevent auto-doping in mixed-mode product fabrication
US6232172B1 (en) 1999-07-16 2001-05-15 Taiwan Semiconductor Manufacturing Company Method to prevent auto-doping induced threshold voltage shift
IT1306181B1 (it) * 1999-08-02 2001-05-30 Shine Spa Procedimento per la formazione di strutture di diversa conduttivita'presentanti una regione di transizione iperfina, ai fini della
JP2004533715A (ja) * 2001-03-30 2004-11-04 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 低温Si及びSiGeエピタキシーにおけるn−型オートドーピングの抑制
US6635556B1 (en) * 2001-05-17 2003-10-21 Matrix Semiconductor, Inc. Method of preventing autodoping
JP4682508B2 (ja) * 2003-11-14 2011-05-11 信越半導体株式会社 シリコンエピタキシャルウェーハの製造方法
JP2009135230A (ja) * 2007-11-29 2009-06-18 Nuflare Technology Inc 気相成長膜形成装置および気相成長膜形成方法
JP5227670B2 (ja) * 2008-06-12 2013-07-03 Sumco Techxiv株式会社 エピタキシャルウェーハの製造方法
JP2010003735A (ja) * 2008-06-18 2010-01-07 Sumco Techxiv株式会社 エピタキシャルウェーハの製造方法及びエピタキシャルウェーハ
CN101783289B (zh) * 2010-03-05 2011-11-30 河北普兴电子科技股份有限公司 反型外延片制备方法
JP6142496B2 (ja) * 2012-10-12 2017-06-07 富士電機株式会社 半導体装置の製造方法
KR20200137259A (ko) 2019-05-29 2020-12-09 삼성전자주식회사 집적회로 소자

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3189494A (en) * 1963-08-22 1965-06-15 Texas Instruments Inc Epitaxial crystal growth onto a stabilizing layer which prevents diffusion from the substrate
US3660180A (en) * 1969-02-27 1972-05-02 Ibm Constrainment of autodoping in epitaxial deposition
US3716422A (en) * 1970-03-30 1973-02-13 Ibm Method of growing an epitaxial layer by controlling autodoping
US3853974A (en) * 1970-04-06 1974-12-10 Siemens Ag Method of producing a hollow body of semiconductor material
US3847686A (en) * 1970-05-27 1974-11-12 Gen Electric Method of forming silicon epitaxial layers
US3669769A (en) * 1970-09-29 1972-06-13 Ibm Method for minimizing autodoping in epitaxial deposition
US3765960A (en) * 1970-11-02 1973-10-16 Ibm Method for minimizing autodoping in epitaxial deposition
US3941647A (en) * 1973-03-08 1976-03-02 Siemens Aktiengesellschaft Method of producing epitaxially semiconductor layers
US3885061A (en) * 1973-08-17 1975-05-20 Rca Corp Dual growth rate method of depositing epitaxial crystalline layers
JPS5322029B2 (de) * 1973-12-26 1978-07-06
JPS5361273A (en) * 1976-11-12 1978-06-01 Nec Home Electronics Ltd Production of semiconductor device
JPS53135571A (en) * 1977-05-02 1978-11-27 Hitachi Ltd Vapor phase growth method for semiconductor
US4497683A (en) * 1982-05-03 1985-02-05 At&T Bell Laboratories Process for producing dielectrically isolated silicon devices
US4504330A (en) * 1983-10-19 1985-03-12 International Business Machines Corporation Optimum reduced pressure epitaxial growth process to prevent autodoping
US4579609A (en) * 1984-06-08 1986-04-01 Massachusetts Institute Of Technology Growth of epitaxial films by chemical vapor deposition utilizing a surface cleaning step immediately before deposition

Also Published As

Publication number Publication date
EP0320970A2 (de) 1989-06-21
EP0320970B1 (de) 1994-09-07
JPH01161826A (ja) 1989-06-26
KR930000609B1 (ko) 1993-01-25
KR890011029A (ko) 1989-08-12
EP0320970A3 (en) 1990-09-12
US4894349A (en) 1990-01-16
DE3851417T2 (de) 1995-01-19

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Legal Events

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8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee