DE3842761A1 - Feldeffekttransistor-verbraucherkreis - Google Patents

Feldeffekttransistor-verbraucherkreis

Info

Publication number
DE3842761A1
DE3842761A1 DE3842761A DE3842761A DE3842761A1 DE 3842761 A1 DE3842761 A1 DE 3842761A1 DE 3842761 A DE3842761 A DE 3842761A DE 3842761 A DE3842761 A DE 3842761A DE 3842761 A1 DE3842761 A1 DE 3842761A1
Authority
DE
Germany
Prior art keywords
field effect
effect transistor
circuit
dfet
circuit according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE3842761A
Other languages
German (de)
English (en)
Other versions
DE3842761C2 (enExample
Inventor
Satoru Tanoi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Publication of DE3842761A1 publication Critical patent/DE3842761A1/de
Application granted granted Critical
Publication of DE3842761C2 publication Critical patent/DE3842761C2/de
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09421Diode field-effect transistor logic
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419Read-write [R-W] circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Static Random-Access Memory (AREA)
  • Networks Using Active Elements (AREA)
DE3842761A 1987-12-18 1988-12-19 Feldeffekttransistor-verbraucherkreis Granted DE3842761A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32064787A JP2542022B2 (ja) 1987-12-18 1987-12-18 電界効果トランジスタ負荷回路

Publications (2)

Publication Number Publication Date
DE3842761A1 true DE3842761A1 (de) 1989-06-29
DE3842761C2 DE3842761C2 (enExample) 1990-12-06

Family

ID=18123746

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3842761A Granted DE3842761A1 (de) 1987-12-18 1988-12-19 Feldeffekttransistor-verbraucherkreis

Country Status (3)

Country Link
US (1) US4996447A (enExample)
JP (1) JP2542022B2 (enExample)
DE (1) DE3842761A1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5239208A (en) * 1988-09-05 1993-08-24 Matsushita Electric Industrial Co., Ltd. Constant current circuit employing transistors having specific gate dimensions
KR920022301A (ko) * 1991-05-28 1992-12-19 김광호 반도체 기억장치
JPH0595267A (ja) * 1991-10-02 1993-04-16 Sumitomo Electric Ind Ltd 半導体論理装置
JP2003150115A (ja) * 2001-08-29 2003-05-23 Seiko Epson Corp 電流生成回路、半導体集積回路、電気光学装置および電子機器
DE202009007039U1 (de) * 2009-05-15 2010-10-14 Stabilo International Gmbh Verschlusskappe

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4195356A (en) * 1978-11-16 1980-03-25 Electronic Memories And Magnetics Corporation Sense line termination circuit for semiconductor memory systems
DE2946803A1 (de) * 1978-11-24 1980-06-04 Hitachi Ltd Speicherschaltung
DE2641860C2 (de) * 1975-12-18 1982-11-04 International Business Machines Corp., 10504 Armonk, N.Y. Integrierte Stromversorgungsschaltung
US4516225A (en) * 1983-02-18 1985-05-07 Advanced Micro Devices, Inc. MOS Depletion load circuit
DE3521480A1 (de) * 1984-06-15 1985-12-19 Hitachi, Ltd., Tokio/Tokyo Speichervorrichtung
DE8714849U1 (de) * 1986-12-23 1987-12-23 Jenoptik Jena Gmbh, Ddr 6900 Jena Geregelter CMOS-Substratspannungsgenerator

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4521698A (en) * 1982-12-02 1985-06-04 Mostek Corporation Mos output driver circuit avoiding hot-electron effects
JPS59221888A (ja) * 1983-06-01 1984-12-13 Hitachi Ltd 半導体記憶装置
US4656372A (en) * 1985-11-25 1987-04-07 Ncr Corporation CMOS to ECL interface circuit

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2641860C2 (de) * 1975-12-18 1982-11-04 International Business Machines Corp., 10504 Armonk, N.Y. Integrierte Stromversorgungsschaltung
US4195356A (en) * 1978-11-16 1980-03-25 Electronic Memories And Magnetics Corporation Sense line termination circuit for semiconductor memory systems
DE2946803A1 (de) * 1978-11-24 1980-06-04 Hitachi Ltd Speicherschaltung
US4516225A (en) * 1983-02-18 1985-05-07 Advanced Micro Devices, Inc. MOS Depletion load circuit
DE3521480A1 (de) * 1984-06-15 1985-12-19 Hitachi, Ltd., Tokio/Tokyo Speichervorrichtung
DE8714849U1 (de) * 1986-12-23 1987-12-23 Jenoptik Jena Gmbh, Ddr 6900 Jena Geregelter CMOS-Substratspannungsgenerator

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
US-Z: Digital driver with mesfets having three different threshold voltages. In: IBM Technical Disclosure Bulletin, Vol.29, No.7, Dec. 1986, S.2885-2886 *
US-Z: IBRRAHIM et al.: GaAs Inverted Common Drain Logic (ICDL) and its Performance compared with other GaAs Logic Families. In: Solid-State Electronics, Vol.30, No.4, 1987, S.403-405 *

Also Published As

Publication number Publication date
DE3842761C2 (enExample) 1990-12-06
JP2542022B2 (ja) 1996-10-09
JPH01162016A (ja) 1989-06-26
US4996447A (en) 1991-02-26

Similar Documents

Publication Publication Date Title
DE3688088T2 (de) Integrierte halbleiterschaltung.
DE4330778C2 (de) Speicherzellenschaltung
DE69315973T2 (de) Niedrig-nach Hochpegel Umsetzer mit latch-up-Festigkeit
DE69027240T2 (de) Steuerschaltung für einen MOS-Leistungstransistor mit induktiver Last
DE3851518T2 (de) TTL-kompatible Umschalterschaltung mit gesteuerter Ausgangssteilheit.
DE69313026T2 (de) Schnelle CMOS Ausgangspufferschaltungen
DE10219649C1 (de) Differentielle Strombewerterschaltung und Leseverstärkerschaltung zum Bewerten eines Speicherzustands einer SRAM-Halbleiterspeicherzelle
DE2111979A1 (de) Feldeffekt-Halbleitereinrichtung
DE3228013A1 (de) Treiberschaltung fuer eine sammelleitung
DE69222275T2 (de) BICMOS-Bus-Ausgangstreiber kompatibel mit einem Mischspannungssystem
DE69132263T2 (de) In einem Verbundhalbleitersubstrat gefertigter integrierter E/D Schaltkreis
DE69517287T2 (de) Pegelumsetzer
DE2749051A1 (de) Mos-eingangspuffer mit hysteresis
DE3882742T2 (de) Halbleiter - Pufferschaltung.
DE2802595C2 (de) Schaltungsanordnung mit Feldeffekttransistoren zur Spannungspegelumsetzung
EP0363985B1 (de) Leistungsverstärkerschaltung für integrierte Digitalschaltungen
DE3686090T2 (de) Nmos-datenspeicherzelle und schieberegister.
DE68918894T2 (de) Statische MESFET-Speicherzelle mit wahlfreiem Zugriff.
DE3842761C2 (enExample)
DE69221407T2 (de) Integrierte CMOS-Pegelverschiebungsschaltungen
DE2929383A1 (de) Schaltungsanordnung zur spannungspegelumsetzung und zugehoeriges verfahren
DE69023358T2 (de) Logische Schaltung.
DE3882791T2 (de) Halbleiterspeicheranordnung mit einem Resonanz-Tunnel-Transistor.
EP0351634B1 (de) Halbleiterschaltung für schnelle Schaltvorgänge
DE3875985T2 (de) Logische schaltung mit feldeffekttransistor, der eine verbindung mit gleichrichtender charakteristik zwischen gatter und quelle aufweist.

Legal Events

Date Code Title Description
OM8 Search report available as to paragraph 43 lit. 1 sentence 1 patent law
8110 Request for examination paragraph 44
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee