DE3788482D1 - Halbleiteranordnung mit einem MOS-Transistor und Verfahren zu deren Herstellung. - Google Patents
Halbleiteranordnung mit einem MOS-Transistor und Verfahren zu deren Herstellung.Info
- Publication number
- DE3788482D1 DE3788482D1 DE87112036T DE3788482T DE3788482D1 DE 3788482 D1 DE3788482 D1 DE 3788482D1 DE 87112036 T DE87112036 T DE 87112036T DE 3788482 T DE3788482 T DE 3788482T DE 3788482 D1 DE3788482 D1 DE 3788482D1
- Authority
- DE
- Germany
- Prior art keywords
- production
- mos transistor
- semiconductor arrangement
- semiconductor
- arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
- H01L29/7404—Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device
- H01L29/742—Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device the device being a field effect transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/87—Thyristor diodes, e.g. Shockley diodes, break-over diodes
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Thyristors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61229154A JPS6384067A (ja) | 1986-09-27 | 1986-09-27 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3788482D1 true DE3788482D1 (de) | 1994-01-27 |
DE3788482T2 DE3788482T2 (de) | 1994-05-19 |
Family
ID=16887623
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3788482T Expired - Lifetime DE3788482T2 (de) | 1986-09-27 | 1987-08-19 | Halbleiteranordnung mit einem MOS-Transistor und Verfahren zu deren Herstellung. |
Country Status (4)
Country | Link |
---|---|
US (1) | US5030581A (de) |
EP (1) | EP0262370B1 (de) |
JP (1) | JPS6384067A (de) |
DE (1) | DE3788482T2 (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04284669A (ja) * | 1991-03-14 | 1992-10-09 | Fuji Electric Co Ltd | 絶縁ゲート制御サイリスタ |
DE4135411A1 (de) * | 1991-10-26 | 1993-04-29 | Asea Brown Boveri | Abschaltbares leistungshalbleiter-bauelement |
JPH06169089A (ja) * | 1992-05-07 | 1994-06-14 | Nec Corp | 縦型mosfetの製造方法 |
EP0660396B1 (de) * | 1993-12-24 | 1998-11-04 | Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno | MOS-Leistungs-Chip-Typ und Packungszusammenbau |
US5798287A (en) * | 1993-12-24 | 1998-08-25 | Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno | Method for forming a power MOS device chip |
US5424226A (en) * | 1994-04-11 | 1995-06-13 | Xerox Corporation | Method of fabricating NMOS and PMOS FET's in a CMOS process |
US5474946A (en) * | 1995-02-17 | 1995-12-12 | International Rectifier Corporation | Reduced mask process for manufacture of MOS gated devices |
US5728612A (en) * | 1996-07-19 | 1998-03-17 | Lsi Logic Corporation | Method for forming minimum area structures for sub-micron CMOS ESD protection in integrated circuit structures without extra implant and mask steps, and articles formed thereby |
KR100273291B1 (ko) * | 1998-04-20 | 2001-01-15 | 김영환 | 모스 전계 효과 트랜지스터의 제조 방법 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3608189A (en) * | 1970-01-07 | 1971-09-28 | Gen Electric | Method of making complementary field-effect transistors by single step diffusion |
JPS5248979A (en) * | 1975-10-17 | 1977-04-19 | Mitsubishi Electric Corp | Process for production of complementary type mos integrated circuit de vice |
CH616024A5 (de) * | 1977-05-05 | 1980-02-29 | Centre Electron Horloger | |
US4306916A (en) * | 1979-09-20 | 1981-12-22 | American Microsystems, Inc. | CMOS P-Well selective implant method |
US4287661A (en) * | 1980-03-26 | 1981-09-08 | International Business Machines Corporation | Method for making an improved polysilicon conductor structure utilizing reactive-ion etching and thermal oxidation |
US4608668A (en) * | 1981-09-03 | 1986-08-26 | Tokyo Shibaura Denki Kabushiki Kaisha | Semiconductor device |
JPS6074678A (ja) * | 1983-09-30 | 1985-04-26 | Toshiba Corp | 半導体装置 |
JPH0697692B2 (ja) * | 1984-01-17 | 1994-11-30 | 株式会社東芝 | 半導体装置 |
JPS61180484A (ja) * | 1985-02-05 | 1986-08-13 | Nec Corp | 縦型電界効果トランジスタの製造方法 |
US4713329A (en) * | 1985-07-22 | 1987-12-15 | Data General Corporation | Well mask for CMOS process |
-
1986
- 1986-09-27 JP JP61229154A patent/JPS6384067A/ja active Granted
-
1987
- 1987-08-19 DE DE3788482T patent/DE3788482T2/de not_active Expired - Lifetime
- 1987-08-19 EP EP87112036A patent/EP0262370B1/de not_active Expired - Lifetime
-
1989
- 1989-11-13 US US07/522,412 patent/US5030581A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE3788482T2 (de) | 1994-05-19 |
JPS6384067A (ja) | 1988-04-14 |
EP0262370B1 (de) | 1993-12-15 |
US5030581A (en) | 1991-07-09 |
EP0262370A3 (en) | 1990-03-14 |
JPH0548957B2 (de) | 1993-07-22 |
EP0262370A2 (de) | 1988-04-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |