DE3780390D1 - Integrierter schaltkreis zur abschirmung von ladungstraegerinjektionen in das substrat, insbesondere bei schaltkreisen mit induktiven und kapazitiven lasten. - Google Patents

Integrierter schaltkreis zur abschirmung von ladungstraegerinjektionen in das substrat, insbesondere bei schaltkreisen mit induktiven und kapazitiven lasten.

Info

Publication number
DE3780390D1
DE3780390D1 DE8787113468T DE3780390T DE3780390D1 DE 3780390 D1 DE3780390 D1 DE 3780390D1 DE 8787113468 T DE8787113468 T DE 8787113468T DE 3780390 T DE3780390 T DE 3780390T DE 3780390 D1 DE3780390 D1 DE 3780390D1
Authority
DE
Germany
Prior art keywords
inductive
circuits
substrate
integrated circuit
capacitive loads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787113468T
Other languages
English (en)
Other versions
DE3780390T2 (de
Inventor
Franco Bertotti
Paolo Ferrari
Maria Teresa Gatti
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
SGS Thomson Microelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SRL filed Critical SGS Thomson Microelectronics SRL
Application granted granted Critical
Publication of DE3780390D1 publication Critical patent/DE3780390D1/de
Publication of DE3780390T2 publication Critical patent/DE3780390T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/914—Polysilicon containing oxygen, nitrogen, or carbon, e.g. sipos

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE8787113468T 1986-09-25 1987-09-15 Integrierter schaltkreis zur abschirmung von ladungstraegerinjektionen in das substrat, insbesondere bei schaltkreisen mit induktiven und kapazitiven lasten. Expired - Fee Related DE3780390T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT21817/86A IT1197279B (it) 1986-09-25 1986-09-25 Dispositivo integrato per schermare l'iniezione di cariche nel substrato, in particolare in circuiti di pilotaggio di carichi induttivi e/o capacitivi

Publications (2)

Publication Number Publication Date
DE3780390D1 true DE3780390D1 (de) 1992-08-20
DE3780390T2 DE3780390T2 (de) 1993-03-11

Family

ID=11187276

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787113468T Expired - Fee Related DE3780390T2 (de) 1986-09-25 1987-09-15 Integrierter schaltkreis zur abschirmung von ladungstraegerinjektionen in das substrat, insbesondere bei schaltkreisen mit induktiven und kapazitiven lasten.

Country Status (5)

Country Link
US (1) US4890149A (de)
EP (1) EP0261556B1 (de)
JP (1) JP2525208B2 (de)
DE (1) DE3780390T2 (de)
IT (1) IT1197279B (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1231894B (it) * 1987-10-15 1992-01-15 Sgs Microelettronica Spa Dispositivo integrato per schermare l'iniezione di cariche nel substrato.
DE3924278A1 (de) * 1988-08-10 1990-02-15 Bosch Gmbh Robert Elektronisches, monolithisch integriertes geraet
US4998160A (en) * 1989-01-23 1991-03-05 Motorola, Inc. Substrate power supply contact for power integrated circuits
WO1991016728A1 (en) * 1990-04-13 1991-10-31 Kabushiki Kaisha Toshiba Substrate structure of a semiconductor device
DE4133245C2 (de) * 1991-10-08 2001-09-20 Bosch Gmbh Robert Bipolare monolithisch integrierte Schaltung
IT1252623B (it) * 1991-12-05 1995-06-19 Sgs Thomson Microelectronics Dispositivo a semiconduttore comprendente almeno un transistor di potenza e almeno un circuito di comando, con circuito di isolamento dinamico,integrati in maniera monolitica nella stessa piastrina
DE4209523C1 (de) * 1992-03-24 1993-03-11 Siemens Ag, 8000 Muenchen, De
US5243214A (en) * 1992-04-14 1993-09-07 North American Philips Corp. Power integrated circuit with latch-up prevention
JPH0786430A (ja) * 1993-09-14 1995-03-31 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5408122A (en) * 1993-12-01 1995-04-18 Eastman Kodak Company Vertical structure to minimize settling times for solid state light detectors
US5495123A (en) * 1994-10-31 1996-02-27 Sgs-Thomson Microelectronics, Inc. Structure to protect against below ground current injection
DE69528958T2 (de) * 1995-01-31 2003-09-11 St Microelectronics Srl Monolitische Ausgangsstufe mit Eigenbeschirmung gegen Latch-up-Phänomene
US5610079A (en) * 1995-06-19 1997-03-11 Reliance Electric Industrial Company Self-biased moat for parasitic current suppression in integrated circuits
EP0757389B1 (de) * 1995-07-31 2001-09-26 STMicroelectronics S.r.l. Hochspannungstreiberschaltung für induktive Lasten
US5698877A (en) * 1995-10-31 1997-12-16 Gonzalez; Fernando Charge-pumping to increase electron collection efficiency
US5777352A (en) * 1996-09-19 1998-07-07 Eastman Kodak Company Photodetector structure
US5834826A (en) * 1997-05-08 1998-11-10 Stmicroelectronics, Inc. Protection against adverse parasitic effects in junction-isolated integrated circuits
WO1999022409A2 (en) * 1997-10-28 1999-05-06 Koninklijke Philips Electronics N.V. Semiconductor device comprising a half-bridge circuit
US6737713B2 (en) * 2001-07-03 2004-05-18 Tripath Technology, Inc. Substrate connection in an integrated power circuit
JP4775684B2 (ja) * 2003-09-29 2011-09-21 オンセミコンダクター・トレーディング・リミテッド 半導体集積回路装置
JP4775682B2 (ja) * 2003-09-29 2011-09-21 オンセミコンダクター・トレーディング・リミテッド 半導体集積回路装置
US8657824B2 (en) * 2003-11-18 2014-02-25 Smith & Nephew, Inc. Universal double offset surgical instrument
US7514754B2 (en) * 2007-01-19 2009-04-07 Episil Technologies Inc. Complementary metal-oxide-semiconductor transistor for avoiding a latch-up problem
US7411271B1 (en) * 2007-01-19 2008-08-12 Episil Technologies Inc. Complementary metal-oxide-semiconductor field effect transistor
US7538396B2 (en) * 2007-01-19 2009-05-26 Episil Technologies Inc. Semiconductor device and complementary metal-oxide-semiconductor field effect transistor

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4202006A (en) * 1978-02-15 1980-05-06 Rca Corporation Semiconductor integrated circuit device
JPS5730359A (en) * 1980-07-30 1982-02-18 Nec Corp Semiconductor device
SE427598B (sv) * 1981-08-25 1983-04-18 Ericsson Telefon Ab L M Halvledardiod avsedd att inga i integrerade kretsar
US4661838A (en) * 1985-10-24 1987-04-28 General Electric Company High voltage semiconductor devices electrically isolated from an integrated circuit substrate
GB2185621B (en) * 1985-10-29 1988-12-14 Plessey Co Plc Protection structures

Also Published As

Publication number Publication date
US4890149A (en) 1989-12-26
DE3780390T2 (de) 1993-03-11
JP2525208B2 (ja) 1996-08-14
IT1197279B (it) 1988-11-30
EP0261556A1 (de) 1988-03-30
IT8621817A0 (it) 1986-09-25
EP0261556B1 (de) 1992-07-15
JPS6388854A (ja) 1988-04-19
IT8621817A1 (it) 1988-03-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: STMICROELECTRONICS S.R.L., AGRATE BRIANZA, MAILAND

8339 Ceased/non-payment of the annual fee