DE3763267D1 - Datenleseschaltung fuer eine halbleiter-speichervorrichtung. - Google Patents

Datenleseschaltung fuer eine halbleiter-speichervorrichtung.

Info

Publication number
DE3763267D1
DE3763267D1 DE8787300411T DE3763267T DE3763267D1 DE 3763267 D1 DE3763267 D1 DE 3763267D1 DE 8787300411 T DE8787300411 T DE 8787300411T DE 3763267 T DE3763267 T DE 3763267T DE 3763267 D1 DE3763267 D1 DE 3763267D1
Authority
DE
Germany
Prior art keywords
storage device
data reading
semiconductor storage
reading circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787300411T
Other languages
English (en)
Inventor
Atsushi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3763267D1 publication Critical patent/DE3763267D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
DE8787300411T 1986-01-20 1987-01-19 Datenleseschaltung fuer eine halbleiter-speichervorrichtung. Expired - Fee Related DE3763267D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61007953A JPS62167698A (ja) 1986-01-20 1986-01-20 半導体記億装置

Publications (1)

Publication Number Publication Date
DE3763267D1 true DE3763267D1 (de) 1990-07-19

Family

ID=11679852

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787300411T Expired - Fee Related DE3763267D1 (de) 1986-01-20 1987-01-19 Datenleseschaltung fuer eine halbleiter-speichervorrichtung.

Country Status (5)

Country Link
US (1) US4843595A (de)
EP (1) EP0235889B1 (de)
JP (1) JPS62167698A (de)
KR (1) KR900008917B1 (de)
DE (1) DE3763267D1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3708499A1 (de) * 1987-03-16 1988-10-20 Sgs Halbleiterbauelemente Gmbh Digitale gegentakt-treiberschaltung
US4954992A (en) * 1987-12-24 1990-09-04 Mitsubishi Denki Kabushiki Kaisha Random access memory having separate read out and write in bus lines for reduced access time and operating method therefor
US5276643A (en) * 1988-08-11 1994-01-04 Siemens Aktiengesellschaft Integrated semiconductor circuit
JPH0646513B2 (ja) * 1989-07-12 1994-06-15 株式会社東芝 半導体記憶装置のデータ読出回路
JP2534782B2 (ja) * 1989-11-10 1996-09-18 株式会社東芝 半導体装置
US4972374A (en) * 1989-12-27 1990-11-20 Motorola, Inc. Output amplifying stage with power saving feature
JP2573392B2 (ja) * 1990-03-30 1997-01-22 株式会社東芝 半導体記憶装置
JPH0474382A (ja) * 1990-07-17 1992-03-09 Fujitsu Ltd 半導体記憶装置
KR940007639B1 (ko) * 1991-07-23 1994-08-22 삼성전자 주식회사 분할된 입출력 라인을 갖는 데이타 전송회로
EP0547889B1 (de) * 1991-12-17 1999-04-14 STMicroelectronics, Inc. Tristate-Treiberschaltung für interne Datenbusleitungen
US5295104A (en) * 1991-12-17 1994-03-15 Sgs-Thomson Microelectronics, Inc. Integrated circuit with precharged internal data bus
US5481500A (en) * 1994-07-22 1996-01-02 International Business Machines Corporation Precharged bit decoder and sense amplifier with integrated latch usable in pipelined memories
GB2321736B (en) * 1997-01-30 2001-04-11 Motorola Ltd Sense amplifier circuit

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2129235A1 (de) * 1971-06-12 1973-01-04 Licentia Gmbh Verstaerkeranordnung fuer impulse geringen energieinhalts, insbesondere zur anwendung als leseverstaerker fuer magnetschicht- oder magnetdrahtspeicher
US4150441A (en) * 1978-03-20 1979-04-17 Microtechnology Corporation Clocked static memory
JPS5570989A (en) * 1978-11-24 1980-05-28 Hitachi Ltd Differential type sense amplifier
JPS5833638B2 (ja) * 1979-09-21 1983-07-21 株式会社日立製作所 メモリ装置
JPS595989B2 (ja) * 1980-02-16 1984-02-08 富士通株式会社 スタティック型ランダムアクセスメモリ
US4742488A (en) * 1982-10-25 1988-05-03 Advanced Micro Devices, Inc. Sense amplifier/write circuit for semiconductor memories
JPS59181829A (ja) * 1983-03-31 1984-10-16 Toshiba Corp 半導体素子の出力バツフア回路
JPS6063786A (ja) * 1983-09-17 1985-04-12 Fujitsu Ltd センスアンプ
JPS6061987A (ja) * 1983-09-14 1985-04-09 Mitsubishi Electric Corp 半導体メモリ装置
DD219615A1 (de) * 1983-12-01 1985-03-06 Mikroelektronik Zt Forsch Tech Asymmetrische schreib-lese-schaltung
JPS60254485A (ja) * 1984-05-31 1985-12-16 Nec Corp スタテイツク型半導体記憶装置
EP0179351B1 (de) * 1984-10-11 1992-10-07 Hitachi, Ltd. Halbleiterspeicher
US4713797A (en) * 1985-11-25 1987-12-15 Motorola Inc. Current mirror sense amplifier for a non-volatile memory
JPS62192997A (ja) * 1986-02-20 1987-08-24 Toshiba Corp カレントミラ−型センスアンプ

Also Published As

Publication number Publication date
JPS62167698A (ja) 1987-07-24
EP0235889B1 (de) 1990-06-13
EP0235889A1 (de) 1987-09-09
KR900008917B1 (ko) 1990-12-11
US4843595A (en) 1989-06-27
KR870007510A (ko) 1987-08-19
JPH043035B2 (de) 1992-01-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee