DE3676296D1 - Mikroelektronisches gehaeuse. - Google Patents

Mikroelektronisches gehaeuse.

Info

Publication number
DE3676296D1
DE3676296D1 DE8686906507T DE3676296T DE3676296D1 DE 3676296 D1 DE3676296 D1 DE 3676296D1 DE 8686906507 T DE8686906507 T DE 8686906507T DE 3676296 T DE3676296 T DE 3676296T DE 3676296 D1 DE3676296 D1 DE 3676296D1
Authority
DE
Germany
Prior art keywords
microelectronic housing
microelectronic
housing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686906507T
Other languages
English (en)
Inventor
Albert Kamensky
E Gates
C Devendorf
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Application granted granted Critical
Publication of DE3676296D1 publication Critical patent/DE3676296D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/647—Resistive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Measurement Of The Respiration, Hearing Ability, Form, And Blood Characteristics Of Living Organisms (AREA)
DE8686906507T 1985-08-27 1986-08-15 Mikroelektronisches gehaeuse. Expired - Fee Related DE3676296D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/770,038 US4705917A (en) 1985-08-27 1985-08-27 Microelectronic package
PCT/US1986/001684 WO1987001510A1 (en) 1985-08-27 1986-08-15 Microelectronic package

Publications (1)

Publication Number Publication Date
DE3676296D1 true DE3676296D1 (de) 1991-01-31

Family

ID=25087282

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686906507T Expired - Fee Related DE3676296D1 (de) 1985-08-27 1986-08-15 Mikroelektronisches gehaeuse.

Country Status (7)

Country Link
US (1) US4705917A (de)
EP (1) EP0236493B1 (de)
JP (1) JPS63500692A (de)
AU (1) AU581545B2 (de)
DE (1) DE3676296D1 (de)
IL (1) IL79656A (de)
WO (1) WO1987001510A1 (de)

Families Citing this family (67)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4780795A (en) * 1986-04-28 1988-10-25 Burr-Brown Corporation Packages for hybrid integrated circuit high voltage isolation amplifiers and method of manufacture
DE3677601D1 (de) * 1986-08-22 1991-03-28 Ibm Deutschland Integriertes verdrahtungssystem fuer sehr hochintegrierte schaltungen.
US4835120A (en) * 1987-01-12 1989-05-30 Debendra Mallik Method of making a multilayer molded plastic IC package
US4891687A (en) * 1987-01-12 1990-01-02 Intel Corporation Multi-layer molded plastic IC package
US4922324A (en) * 1987-01-20 1990-05-01 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device
US4837408A (en) * 1987-05-21 1989-06-06 Ngk Spark Plug Co., Ltd. High density multilayer wiring board and the manufacturing thereof
US5016085A (en) * 1988-03-04 1991-05-14 Hughes Aircraft Company Hermetic package for integrated circuit chips
US5099306A (en) * 1988-11-21 1992-03-24 Honeywell Inc. Stacked tab leadframe assembly
US4907128A (en) * 1988-12-15 1990-03-06 Grumman Aerospace Corporation Chip to multilevel circuit board bonding
US5027191A (en) * 1989-05-11 1991-06-25 Westinghouse Electric Corp. Cavity-down chip carrier with pad grid array
US5459634A (en) * 1989-05-15 1995-10-17 Rogers Corporation Area array interconnect device and method of manufacture thereof
US4949453A (en) * 1989-06-15 1990-08-21 Cray Research, Inc. Method of making a chip carrier with terminating resistive elements
USRE34395E (en) * 1989-06-15 1993-10-05 Cray Research, Inc. Method of making a chip carrier with terminating resistive elements
US5122620A (en) * 1989-06-15 1992-06-16 Cray Research Inc. Chip carrier with terminating resistive elements
US5258576A (en) * 1989-06-15 1993-11-02 Cray Research, Inc. Integrated circuit chip carrier lid
JPH0336614A (ja) * 1989-07-03 1991-02-18 Mitsumi Electric Co Ltd 回路モジュール
US5177668A (en) * 1989-07-15 1993-01-05 Diehl Gmbh & Co. Arrangement of an integrated circuit on a circuit board
US5101149A (en) * 1989-07-18 1992-03-31 National Semiconductor Corporation Modifiable IC board
US5150280A (en) * 1989-08-11 1992-09-22 Fujitsu Limited Electronic circuit package
US5299730A (en) * 1989-08-28 1994-04-05 Lsi Logic Corporation Method and apparatus for isolation of flux materials in flip-chip manufacturing
US5006963A (en) * 1989-12-18 1991-04-09 Mcdonnell Douglas Corporation Selectable chip carrier
US5200642A (en) * 1989-12-19 1993-04-06 Lsi Logic Corporation Internal capacitor arrangement for semiconductor device assembly
US5159750A (en) * 1989-12-20 1992-11-03 National Semiconductor Corporation Method of connecting an IC component with another electrical component
US5008734A (en) * 1989-12-20 1991-04-16 National Semiconductor Corporation Stadium-stepped package for an integrated circuit with air dielectric
US5027253A (en) * 1990-04-09 1991-06-25 Ibm Corporation Printed circuit boards and cards having buried thin film capacitors and processing techniques for fabricating said boards and cards
US5068631A (en) * 1990-08-09 1991-11-26 At&T Bell Laboratories Sub power plane to provide EMC filtering for VLSI devices
US5399903A (en) * 1990-08-15 1995-03-21 Lsi Logic Corporation Semiconductor device having an universal die size inner lead layout
US5254493A (en) * 1990-10-30 1993-10-19 Microelectronics And Computer Technology Corporation Method of fabricating integrated resistors in high density substrates
US5120572A (en) * 1990-10-30 1992-06-09 Microelectronics And Computer Technology Corporation Method of fabricating electrical components in high density substrates
JPH05160292A (ja) * 1991-06-06 1993-06-25 Toshiba Corp 多層パッケージ
US5210683A (en) * 1991-08-22 1993-05-11 Lsi Logic Corporation Recessed chip capacitor wells with cleaning channels on integrated circuit packages
US5249098A (en) * 1991-08-22 1993-09-28 Lsi Logic Corporation Semiconductor device package with solder bump electrical connections on an external surface of the package
JPH05109924A (ja) * 1991-10-17 1993-04-30 Ngk Spark Plug Co Ltd 集積回路用パツケージ
DE69120282T2 (de) * 1991-12-19 1996-12-05 Ibm Ersetzungsverfahren für Chips
US5434750A (en) * 1992-02-07 1995-07-18 Lsi Logic Corporation Partially-molded, PCB chip carrier package for certain non-square die shapes
CA2092767A1 (en) * 1992-03-26 1993-09-27 Takatoshi Takikawa Semiconductor device
US5444600A (en) * 1992-12-03 1995-08-22 Linear Technology Corporation Lead frame capacitor and capacitively-coupled isolator circuit using the same
US5283717A (en) * 1992-12-04 1994-02-01 Sgs-Thomson Microelectronics, Inc. Circuit assembly having interposer lead frame
US5325268A (en) * 1993-01-28 1994-06-28 National Semiconductor Corporation Interconnector for a multi-chip module or package
US5455385A (en) * 1993-06-28 1995-10-03 Harris Corporation Multilayer LTCC tub architecture for hermetically sealing semiconductor die, external electrical access for which is provided by way of sidewall recesses
US5438477A (en) * 1993-08-12 1995-08-01 Lsi Logic Corporation Die-attach technique for flip-chip style mounting of semiconductor dies
US5388327A (en) * 1993-09-15 1995-02-14 Lsi Logic Corporation Fabrication of a dissolvable film carrier containing conductive bump contacts for placement on a semiconductor device package
EP0658937A1 (de) * 1993-12-08 1995-06-21 Hughes Aircraft Company Aus dielektrischen Bändern hergestellter vertikaler Stapel integrierter Schaltungen aus diskreten Trägern
JP3094069B2 (ja) * 1993-12-24 2000-10-03 日本特殊陶業株式会社 セラミックパッケージ本体の製造方法
US6339191B1 (en) 1994-03-11 2002-01-15 Silicon Bandwidth Inc. Prefabricated semiconductor chip carrier
US5824950A (en) * 1994-03-11 1998-10-20 The Panda Project Low profile semiconductor die carrier
US5821457A (en) * 1994-03-11 1998-10-13 The Panda Project Semiconductor die carrier having a dielectric epoxy between adjacent leads
GB2288286A (en) * 1994-03-30 1995-10-11 Plessey Semiconductors Ltd Ball grid array arrangement
US5542175A (en) * 1994-12-20 1996-08-06 International Business Machines Corporation Method of laminating and circuitizing substrates having openings therein
KR100275414B1 (ko) * 1995-01-10 2001-01-15 가나이 쓰도무 저emi전자기기, 저emi회로기판 및 그 제조방법
US5631807A (en) * 1995-01-20 1997-05-20 Minnesota Mining And Manufacturing Company Electronic circuit structure with aperture suspended component
US5719748A (en) * 1995-06-28 1998-02-17 Honeywell Inc. Semiconductor package with a bridge for chip area connection
US5831810A (en) * 1996-08-21 1998-11-03 International Business Machines Corporation Electronic component package with decoupling capacitors completely within die receiving cavity of substrate
JP3732927B2 (ja) * 1997-07-31 2006-01-11 京セラ株式会社 多層配線基板
US6141869A (en) 1998-10-26 2000-11-07 Silicon Bandwidth, Inc. Apparatus for and method of manufacturing a semiconductor die carrier
US6307258B1 (en) 1998-12-22 2001-10-23 Silicon Bandwidth, Inc. Open-cavity semiconductor die package
JP2000216343A (ja) * 1999-01-27 2000-08-04 Nec Corp 半導体集積回路
US6271469B1 (en) * 1999-11-12 2001-08-07 Intel Corporation Direct build-up layer on an encapsulated die package
US6507147B1 (en) * 2000-08-31 2003-01-14 Intevac, Inc. Unitary vacuum tube incorporating high voltage isolation
JP2005347369A (ja) * 2004-06-01 2005-12-15 Renesas Technology Corp 半導体装置およびその製造方法
CN100553413C (zh) * 2005-05-12 2009-10-21 株式会社村田制作所 多层陶瓷基板
US7253518B2 (en) 2005-06-15 2007-08-07 Endicott Interconnect Technologies, Inc. Wirebond electronic package with enhanced chip pad design, method of making same, and information handling system utilizing same
JP4770514B2 (ja) * 2006-02-27 2011-09-14 株式会社デンソー 電子装置
JP5754507B2 (ja) * 2011-06-21 2015-07-29 株式会社村田製作所 回路モジュール
US9041205B2 (en) 2013-06-28 2015-05-26 Intel Corporation Reliable microstrip routing for electronics components
JP6633381B2 (ja) * 2015-12-17 2020-01-22 京セラ株式会社 電子部品搭載用基板、電子装置および電子モジュール
US11222850B2 (en) * 2019-05-15 2022-01-11 Mediatek Inc. Electronic package with rotated semiconductor die

Family Cites Families (12)

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Publication number Priority date Publication date Assignee Title
US3753054A (en) * 1970-01-02 1973-08-14 Texas Instruments Inc Hermetically sealed electronic package
JPS5336468A (en) * 1976-09-17 1978-04-04 Hitachi Ltd Package for integrated circuit
FR2435883A1 (fr) * 1978-06-29 1980-04-04 Materiel Telephonique Circuit integre hybride et son procede de fabrication
US4288841A (en) * 1979-09-20 1981-09-08 Bell Telephone Laboratories, Incorporated Double cavity semiconductor chip carrier
US4322778A (en) * 1980-01-25 1982-03-30 International Business Machines Corp. High performance semiconductor package assembly
US4338621A (en) * 1980-02-04 1982-07-06 Burroughs Corporation Hermetic integrated circuit package for high density high power applications
JPS57184246A (en) * 1981-05-08 1982-11-12 Omron Tateisi Electronics Co Semiconductor device
JPS58197863A (ja) * 1982-05-14 1983-11-17 Nec Corp 半導体装置
JPS5910240A (ja) * 1982-07-09 1984-01-19 Nec Corp 半導体装置
US4551746A (en) * 1982-10-05 1985-11-05 Mayo Foundation Leadless chip carrier apparatus providing an improved transmission line environment and improved heat dissipation
US4513355A (en) * 1983-06-15 1985-04-23 Motorola, Inc. Metallization and bonding means and method for VLSI packages
JPS6010647A (ja) * 1983-06-29 1985-01-19 Nec Corp 混成集積回路装置

Also Published As

Publication number Publication date
WO1987001510A1 (en) 1987-03-12
AU6521586A (en) 1987-03-24
US4705917A (en) 1987-11-10
IL79656A (en) 1991-06-10
EP0236493A1 (de) 1987-09-16
JPS63500692A (ja) 1988-03-10
IL79656A0 (en) 1986-11-30
JPH0324067B2 (de) 1991-04-02
AU581545B2 (en) 1989-02-23
EP0236493B1 (de) 1990-12-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee