DE3621667C2 - - Google Patents

Info

Publication number
DE3621667C2
DE3621667C2 DE3621667A DE3621667A DE3621667C2 DE 3621667 C2 DE3621667 C2 DE 3621667C2 DE 3621667 A DE3621667 A DE 3621667A DE 3621667 A DE3621667 A DE 3621667A DE 3621667 C2 DE3621667 C2 DE 3621667C2
Authority
DE
Germany
Prior art keywords
paste
insulating
conductive
layer
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3621667A
Other languages
German (de)
English (en)
Other versions
DE3621667A1 (de
Inventor
Tsuneo Kaneko
Shiro Yokohama Jp Ezaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP14375885A external-priority patent/JPS624354A/ja
Priority claimed from JP16723585A external-priority patent/JPS6229194A/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE3621667A1 publication Critical patent/DE3621667A1/de
Application granted granted Critical
Publication of DE3621667C2 publication Critical patent/DE3621667C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H05K3/4667—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders characterized by using an inorganic intermediate insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • H10D86/85—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors characterised by only passive components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/035—Paste overlayer, i.e. conductive paste or solder paste over conductive layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/08—Treatments involving gases
    • H05K2203/086—Using an inert gas
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1126—Firing, i.e. heating a powder or paste above the melting temperature of at least one of its constituents
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1283—After-treatment of the printed patterns, e.g. sintering or curing methods
    • H05K3/1291—Firing or sintering at relative high temperatures for patterns on inorganic boards, e.g. co-firing of circuits on green ceramic sheets
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00—Stock material or miscellaneous articles
    • Y10S428/901—Printed circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24926—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including ceramic, glass, porcelain or quartz layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Non-Adjustable Resistors (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
DE19863621667 1985-06-29 1986-06-27 Mit einer mehrzahl von dickfilmen beschichtetes substrat, verfahren zu seiner herstellung und dieses enthaltende vorrichtung Granted DE3621667A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP14375885A JPS624354A (ja) 1985-06-29 1985-06-29 厚膜多層基板の製造方法
JP16723585A JPS6229194A (ja) 1985-07-29 1985-07-29 厚膜基板装置

Publications (2)

Publication Number Publication Date
DE3621667A1 DE3621667A1 (de) 1987-01-08
DE3621667C2 true DE3621667C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-05-27

Family

ID=26475403

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19863621667 Granted DE3621667A1 (de) 1985-06-29 1986-06-27 Mit einer mehrzahl von dickfilmen beschichtetes substrat, verfahren zu seiner herstellung und dieses enthaltende vorrichtung

Country Status (2)

Country Link
US (2) US4830878A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE3621667A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4837050A (en) * 1986-09-30 1989-06-06 Asahi Chemical Research Laboratory Co., Ltd. Method for producing electrically conductive circuits on a base board
JPS63141388A (ja) * 1986-12-03 1988-06-13 東芝ライテック株式会社 厚膜回路基板の製造方法
US5502889A (en) * 1988-06-10 1996-04-02 Sheldahl, Inc. Method for electrically and mechanically connecting at least two conductive layers
US5122929A (en) * 1988-08-16 1992-06-16 Delco Electronics Corporation Method of achieving selective inhibition and control of adhesion in thick-film conductors
US5176853A (en) * 1988-08-16 1993-01-05 Delco Electronics Corporation Controlled adhesion conductor
US5121298A (en) * 1988-08-16 1992-06-09 Delco Electronics Corporation Controlled adhesion conductor
JPH0272695A (ja) * 1988-09-07 1990-03-12 Toshiba Lighting & Technol Corp 混成集積回路
US5169679A (en) * 1988-10-11 1992-12-08 Delco Electronics Corporation Post-termination apparatus and process for thick film resistors of printed circuit boards
US5256836A (en) * 1989-06-09 1993-10-26 Toshiba Lighting & Technology Corporation Thick film hybrid circuit board device and method of manufacturing the same
US5250394A (en) * 1992-01-21 1993-10-05 Industrial Technology Research Institute Metallization method for microwave circuit
DE4345586B4 (de) * 1992-12-22 2009-04-23 Denso Corp., Kariya-shi Verfahren zum Erzeugen von Vielfach-Dickschichtsubstraten
US5727310A (en) * 1993-01-08 1998-03-17 Sheldahl, Inc. Method of manufacturing a multilayer electronic circuit
US5534830A (en) * 1995-01-03 1996-07-09 R F Prime Corporation Thick film balanced line structure, and microwave baluns, resonators, mixers, splitters, and filters constructed therefrom
US5745017A (en) * 1995-01-03 1998-04-28 Rf Prime Corporation Thick film construct for quadrature translation of RF signals
US5599744A (en) * 1995-02-06 1997-02-04 Grumman Aerospace Corporation Method of forming a microcircuit via interconnect
JPH09307220A (ja) * 1996-05-20 1997-11-28 Brother Ind Ltd プリント基板及びその製造方法
US6399230B1 (en) 1997-03-06 2002-06-04 Sarnoff Corporation Multilayer ceramic circuit boards with embedded resistors
JPH10253059A (ja) * 1997-03-11 1998-09-25 Nikko Co 火薬点火発熱具用回路板の製造方法
TW552686B (en) * 2001-07-12 2003-09-11 Hitachi Ltd Electronic circuit component
US6683259B2 (en) * 2002-01-23 2004-01-27 Siemens Vdo Automotive Corporation Printed circuit board incorporating enhanced conductive ink
US9681559B2 (en) * 2013-12-19 2017-06-13 GM Global Technology Operations LLC Thick film circuits with conductive components formed using different conductive elements and related methods
US9190322B2 (en) * 2014-01-24 2015-11-17 Infineon Technologies Ag Method for producing a copper layer on a semiconductor body using a printing process
US10524365B2 (en) * 2015-01-13 2019-12-31 Ngk Spark Plug Co., Ltd. Ceramic substrate
EP4053886A1 (en) * 2021-03-01 2022-09-07 Infineon Technologies AG Method for fabricating a substrate with a solder stop structure, substrate with a solder stop structure and electronic device

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3576668A (en) * 1968-06-07 1971-04-27 United Aircraft Corp Multilayer thick film ceramic hybrid integrated circuit
US3914514A (en) * 1973-08-16 1975-10-21 Trw Inc Termination for resistor and method of making the same
FR2388381A1 (fr) * 1976-12-27 1978-11-17 Labo Electronique Physique Composition dielectrique, pate serigraphiable comportant une telle composition et produits obtenus
US4286251A (en) * 1979-03-05 1981-08-25 Trw, Inc. Vitreous enamel resistor and method of making the same
US4312951A (en) * 1979-09-07 1982-01-26 Mobay Chemical Corporation Low-melting, lead-free ceramic frits
US4316942A (en) * 1980-10-06 1982-02-23 Cts Corporation Thick film copper conductor circuits
JPS5817651A (ja) * 1981-07-24 1983-02-01 Hitachi Ltd 多層回路板とその製造方法
US4374159A (en) * 1981-07-27 1983-02-15 Bell Telephone Laboratories, Incorporated Fabrication of film circuits having a thick film crossunder and a thin film capacitor
US4376169A (en) * 1982-04-28 1983-03-08 Mobay Chemical Corporation Low-melting, lead-free ceramic frits
US4415607A (en) * 1982-09-13 1983-11-15 Allen-Bradley Company Method of manufacturing printed circuit network devices
DE3241225A1 (de) * 1982-11-09 1984-05-10 F & O Electronic Systems GmbH & Co, 6901 Neckarsteinach Verfahren zur herstellung elektronischer schaltelemente und/oder schaltungen in vielschicht-dickfilmtechnik (multilayer thick film technology) auf einem substrat und dergestalt hergestellte schaltelemente und/oder schaltungen
JPS59131540A (ja) * 1983-01-18 1984-07-28 Asahi Glass Co Ltd 絶縁層用ガラス組成物
US4503090A (en) * 1983-02-23 1985-03-05 At&T Bell Laboratories Thick film resistor circuits
KR900004379B1 (ko) * 1983-09-16 1990-06-23 마쯔시다덴기산교 가부시기가이샤 세라믹 다층기판 및 그 제조방법
FR2556503B1 (fr) * 1983-12-08 1986-12-12 Eurofarad Substrat d'interconnexion en alumine pour composant electronique

Also Published As

Publication number Publication date
US4835038A (en) 1989-05-30
US4830878A (en) 1989-05-16
DE3621667A1 (de) 1987-01-08

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee