DE3587846D1 - Verfahren und Gerät zum Prüfen der Geometrie von Mehrschichtmustern für integrierte Schaltungsstrukturen. - Google Patents

Verfahren und Gerät zum Prüfen der Geometrie von Mehrschichtmustern für integrierte Schaltungsstrukturen.

Info

Publication number
DE3587846D1
DE3587846D1 DE3587846T DE3587846T DE3587846D1 DE 3587846 D1 DE3587846 D1 DE 3587846D1 DE 3587846 T DE3587846 T DE 3587846T DE 3587846 T DE3587846 T DE 3587846T DE 3587846 D1 DE3587846 D1 DE 3587846D1
Authority
DE
Germany
Prior art keywords
geometry
checking
integrated circuit
circuit structures
multilayer patterns
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3587846T
Other languages
English (en)
Other versions
DE3587846T2 (de
Inventor
Shunji Maeda
Hitoshi Kubota
Satoru Fushimi
Hiroshi Makihira
Takanori Ninomiya
Yasuo Nakagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP59273052A external-priority patent/JPH0617778B2/ja
Priority claimed from JP60052272A external-priority patent/JPH0656294B2/ja
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE3587846D1 publication Critical patent/DE3587846D1/de
Application granted granted Critical
Publication of DE3587846T2 publication Critical patent/DE3587846T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00—Image analysis
    • G06T7/0002—Inspection of images, e.g. flaw detection
    • G06T7/0004—Industrial image inspection
    • G06T7/001—Industrial image inspection using an image reference approach
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00—Indexing scheme for image analysis or image enhancement
    • G06T2207/10—Image acquisition modality
    • G06T2207/10056—Microscopic image
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00—Indexing scheme for image analysis or image enhancement
    • G06T2207/30—Subject of image; Context of image processing
    • G06T2207/30108—Industrial image inspection
    • G06T2207/30148—Semiconductor; IC; Wafer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Theoretical Computer Science (AREA)
  • Biochemistry (AREA)
  • Pathology (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Health & Medical Sciences (AREA)
  • General Health & Medical Sciences (AREA)
  • Immunology (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Image Processing (AREA)
DE3587846T 1984-12-26 1985-12-20 Verfahren und Gerät zum Prüfen der Geometrie von Mehrschichtmustern für integrierte Schaltungsstrukturen. Expired - Fee Related DE3587846T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP59273052A JPH0617778B2 (ja) 1984-12-26 1984-12-26 パタ−ン欠陥検出方法及びその装置
JP60052272A JPH0656294B2 (ja) 1985-03-18 1985-03-18 多層パターン欠陥検出方法及びその装置

Publications (2)

Publication Number Publication Date
DE3587846D1 true DE3587846D1 (de) 1994-07-14
DE3587846T2 DE3587846T2 (de) 1994-10-06

Family

ID=26392878

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3587846T Expired - Fee Related DE3587846T2 (de) 1984-12-26 1985-12-20 Verfahren und Gerät zum Prüfen der Geometrie von Mehrschichtmustern für integrierte Schaltungsstrukturen.

Country Status (4)

Country Link
US (1) US4791586A (de)
EP (1) EP0186874B1 (de)
KR (1) KR900005349B1 (de)
DE (1) DE3587846T2 (de)

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KR0168829B1 (ko) * 1989-11-06 1999-02-01 리차드 알. 피카드 복수의 개별 집적 회로를 단일 집적 회로화하는 방법
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US5450331A (en) * 1992-01-24 1995-09-12 Vlsi Technology, Inc. Method for verifying circuit layout design
JP2757647B2 (ja) * 1992-01-27 1998-05-25 日本電気株式会社 メッキ膜厚均一化方式
US5398195A (en) * 1992-02-21 1995-03-14 International Business Machines Corporation Method and system for providing a non-rectangular floor plan
KR940017695A (ko) * 1992-12-09 1994-07-27 정용문 블럭간의 유사성을 고려한 중간조 화상의 부호화 방법
US5587918A (en) * 1992-12-28 1996-12-24 Kabushiki Kaisha Toshiba Circuit pattern comparison apparatus
JP3297950B2 (ja) * 1993-07-13 2002-07-02 シャープ株式会社 平面型表示パネル検査装置
JPH0743313A (ja) * 1993-07-29 1995-02-14 Canon Inc 異物検査装置及びそれを用いた半導体デバイスの 製造方法
US5500804A (en) * 1993-12-08 1996-03-19 International Business Machines Corporation Method to optimize the wiring of multiple wiring media packages
US5696835A (en) * 1994-01-21 1997-12-09 Texas Instruments Incorporated Apparatus and method for aligning and measuring misregistration
JPH07253311A (ja) * 1994-03-15 1995-10-03 Fujitsu Ltd パターン検査装置の較正方法、パターン検査方法、パターン位置決定方法、および半導体装置の製造方法
JPH07271594A (ja) * 1994-03-31 1995-10-20 Mitsubishi Electric Corp ファジー開発支援装置
JP3392573B2 (ja) * 1994-03-31 2003-03-31 株式会社東芝 試料検査装置及び方法
US5694481A (en) * 1995-04-12 1997-12-02 Semiconductor Insights Inc. Automated design analysis system for generating circuit schematics from high magnification images of an integrated circuit
US6314194B1 (en) * 1995-07-26 2001-11-06 The United States Of America As Represented By The Secretary Of The Army Method for generating computer aided design programming circuit designs from scanned images of the design
JPH09218163A (ja) * 1996-02-13 1997-08-19 Horiba Ltd 異物検査装置における信号処理方法
US6091846A (en) * 1996-05-31 2000-07-18 Texas Instruments Incorporated Method and system for anomaly detection
US6246787B1 (en) 1996-05-31 2001-06-12 Texas Instruments Incorporated System and method for knowledgebase generation and management
US6292582B1 (en) 1996-05-31 2001-09-18 Lin Youling Method and system for identifying defects in a semiconductor
US6205239B1 (en) 1996-05-31 2001-03-20 Texas Instruments Incorporated System and method for circuit repair
US6072574A (en) 1997-01-30 2000-06-06 Micron Technology, Inc. Integrated circuit defect review and classification process
US6895109B1 (en) * 1997-09-04 2005-05-17 Texas Instruments Incorporated Apparatus and method for automatically detecting defects on silicon dies on silicon wafers
JP3397101B2 (ja) * 1997-10-29 2003-04-14 株式会社日立製作所 欠陥検査方法および装置
US6236222B1 (en) * 1997-11-19 2001-05-22 Philips Electronics North America Corp. Method and apparatus for detecting misalignments in interconnect structures
CA2260510A1 (en) 1998-01-28 1999-07-28 Chipworks Focused ion beam imaging method
US5985497A (en) * 1998-02-03 1999-11-16 Advanced Micro Devices, Inc. Method for reducing defects in a semiconductor lithographic process
US6947587B1 (en) 1998-04-21 2005-09-20 Hitachi, Ltd. Defect inspection method and apparatus
JP2882409B1 (ja) * 1998-04-24 1999-04-12 株式会社東京精密 外観検査装置
US6030154A (en) * 1998-06-19 2000-02-29 International Business Machines Corporation Minimum error algorithm/program
US6332032B1 (en) 1998-12-03 2001-12-18 The United States Of America As Represented By The Secretary Of The Army Method for generating test files from scanned test vector pattern drawings
US6898333B1 (en) * 1999-08-06 2005-05-24 Cognex Corporation Methods and apparatus for determining the orientation of an object in an image
CA2296143A1 (fr) 2000-01-18 2001-07-18 9071 9410 Quebec Inc. Systeme d'inspection optique
JP3858571B2 (ja) * 2000-07-27 2006-12-13 株式会社日立製作所 パターン欠陥検査方法及びその装置
CA2315456C (en) 2000-08-09 2009-10-13 Semiconductor Insights Inc. Schematic organization tool
CA2358729C (en) * 2001-10-12 2008-07-08 Semiconductor Insights Inc. Computer aided method of circuit extraction
JP3647416B2 (ja) * 2002-01-18 2005-05-11 Ｎｅｃエレクトロニクス株式会社 パターン検査装置及びその方法
US6823496B2 (en) * 2002-04-23 2004-11-23 International Business Machines Corporation Physical design characterization system
US7319935B2 (en) * 2003-02-12 2008-01-15 Micron Technology, Inc. System and method for analyzing electrical failure data
JP4331558B2 (ja) * 2003-10-01 2009-09-16 株式会社日立ハイテクノロジーズ 被検査物の外観検査方法及び外観検査装置
US7359577B2 (en) * 2004-07-13 2008-04-15 Yan Wang Differential method for layer-to-layer registration
US7240310B2 (en) * 2004-12-07 2007-07-03 International Business Machines Corporation Method, system and program product for evaluating a circuit
JP4976681B2 (ja) * 2005-10-31 2012-07-18 株式会社東芝 パターン形状評価方法およびパターン形状評価プログラム
US8126257B2 (en) * 2006-04-12 2012-02-28 Kabushiki Kaisha Toshiba Alignment of semiconductor wafer patterns by corresponding edge groups
US7369236B1 (en) * 2006-10-31 2008-05-06 Negevtech, Ltd. Defect detection through image comparison using relative measures
US7873936B2 (en) * 2008-01-04 2011-01-18 International Business Machines Corporation Method for quantifying the manufactoring complexity of electrical designs
JP5320187B2 (ja) * 2009-07-01 2013-10-23 株式会社日立ハイテクノロジーズ 欠陥検査方法及び欠陥検査装置
JP2011247957A (ja) * 2010-05-24 2011-12-08 Toshiba Corp パターン検査方法および半導体装置の製造方法
US8994936B2 (en) * 2012-11-22 2015-03-31 Shenzhen China Star Optoelectronics Technology Co., Ltd Pattern matching method, apparatus and line width measuring machine
KR101565748B1 (ko) 2013-05-31 2015-11-05 삼성에스디에스 주식회사 이미지에서 반복 패턴을 검출하는 방법 및 장치
CN116165853B (zh) * 2023-04-26 2023-09-29 长鑫存储技术有限公司 套刻误差量测方法、校准方法及半导体测试结构

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US4347001A (en) * 1978-04-03 1982-08-31 Kla Instruments Corporation Automatic photomask inspection system and apparatus
US4450579A (en) * 1980-06-10 1984-05-22 Fujitsu Limited Recognition method and apparatus
US4448532A (en) * 1981-03-31 1984-05-15 Kla Instruments Corporation Automatic photomask inspection method and system
JPS5861629A (ja) * 1981-10-09 1983-04-12 Hitachi Ltd ビツトパタ−ン発生装置
US4482971A (en) * 1982-01-18 1984-11-13 The Perkin-Elmer Corporation World wide currency inspection
US4500202A (en) * 1982-05-24 1985-02-19 Itek Corporation Printed circuit board defect detection of detecting maximum line width violations
EP0095517B1 (de) * 1982-05-28 1985-11-21 Ibm Deutschland Gmbh Verfahren und Einrichtung zur automatischen optischen Inspektion
JPS5963725A (ja) * 1982-10-05 1984-04-11 Toshiba Corp パタ−ン検査装置
JPS59157505A (ja) * 1983-02-28 1984-09-06 Hitachi Ltd パタ−ン検査装置
EP0124113B1 (de) * 1983-04-28 1989-03-01 Hitachi, Ltd. Verfahren und Einrichtung zur Feststellung von Fehlern in Mustern
US4579455A (en) * 1983-05-09 1986-04-01 Kla Instruments Corporation Photomask inspection apparatus and method with improved defect detection
US4532650A (en) * 1983-05-12 1985-07-30 Kla Instruments Corporation Photomask inspection apparatus and method using corner comparator defect detection algorithm
JPS6063405A (ja) * 1983-09-16 1985-04-11 Fujitsu Ltd パタ−ン検査方法及びその装置
US4618938A (en) * 1984-02-22 1986-10-21 Kla Instruments Corporation Method and apparatus for automatic wafer inspection

Also Published As

Publication number Publication date
EP0186874B1 (de) 1994-06-08
US4791586A (en) 1988-12-13
EP0186874A3 (en) 1989-07-26
KR860005436A (ko) 1986-07-23
KR900005349B1 (ko) 1990-07-27
DE3587846T2 (de) 1994-10-06
EP0186874A2 (de) 1986-07-09

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee