DE3585177D1 - Buszugriff fuer prozessor. - Google Patents

Buszugriff fuer prozessor.

Info

Publication number
DE3585177D1
DE3585177D1 DE8585106891T DE3585177T DE3585177D1 DE 3585177 D1 DE3585177 D1 DE 3585177D1 DE 8585106891 T DE8585106891 T DE 8585106891T DE 3585177 T DE3585177 T DE 3585177T DE 3585177 D1 DE3585177 D1 DE 3585177D1
Authority
DE
Germany
Prior art keywords
processor
bus access
bus
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585106891T
Other languages
English (en)
Inventor
Eiji Baba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3585177D1 publication Critical patent/DE3585177D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/4031—Coupling between buses using bus bridges with arbitration
DE8585106891T 1984-06-05 1985-06-04 Buszugriff fuer prozessor. Expired - Fee Related DE3585177D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59114874A JPS60258671A (ja) 1984-06-05 1984-06-05 プロセツサ

Publications (1)

Publication Number Publication Date
DE3585177D1 true DE3585177D1 (de) 1992-02-27

Family

ID=14648842

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585106891T Expired - Fee Related DE3585177D1 (de) 1984-06-05 1985-06-04 Buszugriff fuer prozessor.

Country Status (4)

Country Link
US (1) US4737932A (de)
EP (1) EP0166272B1 (de)
JP (1) JPS60258671A (de)
DE (1) DE3585177D1 (de)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2173326B (en) * 1985-03-18 1989-06-21 Nitsuko Ltd Data transmission system
US5297260A (en) * 1986-03-12 1994-03-22 Hitachi, Ltd. Processor having a plurality of CPUS with one CPU being normally connected to common bus
US6379998B1 (en) * 1986-03-12 2002-04-30 Hitachi, Ltd. Semiconductor device and method for fabricating the same
JPS6353669A (ja) * 1986-08-22 1988-03-07 Hitachi Micro Comput Eng Ltd マイクロプロセツサ
DE3632997C2 (de) * 1986-09-29 1995-09-07 Siemens Ag Schaltungsanordnung zur Steuerung des Datentransfers zwischen miteinander verbundenen Steuereinrichtungen
US5280589A (en) * 1987-07-30 1994-01-18 Kabushiki Kaisha Toshiba Memory access control system for use with a relatively small size data processing system
EP0357075A3 (de) * 1988-09-02 1991-12-11 Fujitsu Limited Datensteuerungsvorrichtung und System mit Anwendung dieser Vorrichtung
DE3917715A1 (de) * 1989-05-31 1990-12-06 Teldix Gmbh Rechnersystem
JPH03231320A (ja) * 1990-02-06 1991-10-15 Mitsubishi Electric Corp マイクロコンピュータシステム
US5289585A (en) * 1990-03-26 1994-02-22 Siemens Nixdorf Informationssysteme Ag Multiprocessor system having a system bus for the coupling of several processing units with appertaining private cache memories and a common main memory
US6928500B1 (en) * 1990-06-29 2005-08-09 Hewlett-Packard Development Company, L.P. High speed bus system that incorporates uni-directional point-to-point buses
US5247621A (en) * 1990-09-26 1993-09-21 Advanced Micro Devices, Inc. System and method for processor bus use
GB2251099B (en) * 1990-12-19 1994-08-03 Motorola Inc Bus system
JPH04236682A (ja) * 1991-01-18 1992-08-25 Mitsubishi Electric Corp マイクロコンピュータシステム
US5410654A (en) * 1991-07-22 1995-04-25 International Business Machines Corporation Interface with address decoder for selectively generating first and second address and control signals respectively in response to received address and control signals
US5487153A (en) * 1991-08-30 1996-01-23 Adaptive Solutions, Inc. Neural network sequencer and interface apparatus
JPH0561951A (ja) * 1991-08-30 1993-03-12 Fujitsu Ltd イメージ処理装置
FR2681706A1 (fr) * 1991-09-25 1993-03-26 Systolic Sarl Dispositif de couplage de bus pour systeme informatique comportant plusieurs bus relies entre eux.
US5355455A (en) * 1991-11-19 1994-10-11 International Business Machines Corporation Method and apparatus for avoiding deadlock in a computer system with two or more protocol-controlled buses interconnected by a bus adaptor
DE69320508T2 (de) * 1992-03-04 1999-03-04 Motorola Inc Verfahren und Gerät zur Busarbitrierungsdurchführung mit einem Arbiter in einem Datenverarbeitungssystem
US5426740A (en) * 1994-01-14 1995-06-20 Ast Research, Inc. Signaling protocol for concurrent bus access in a multiprocessor system
JPH08202468A (ja) * 1995-01-27 1996-08-09 Hitachi Ltd マルチプロセッサシステム
US5764931A (en) * 1996-05-31 1998-06-09 Sun Microsystems, Inc. Method and apparatus for passing bus mastership between processors using predefined bus mastership states
US6163828A (en) * 1998-05-22 2000-12-19 Lucent Technologies Inc. Methods and apparatus for providing multi-processor access to shared memory
US20060257884A1 (en) * 2004-05-20 2006-11-16 Amnis Corporation Methods for preparing and analyzing cells having chromosomal abnormalities
US8131053B2 (en) * 1999-01-25 2012-03-06 Amnis Corporation Detection of circulating tumor cells using imaging flow cytometry
US7450229B2 (en) * 1999-01-25 2008-11-11 Amnis Corporation Methods for analyzing inter-cellular phenomena
US8885913B2 (en) 1999-01-25 2014-11-11 Amnis Corporation Detection of circulating tumor cells using imaging flow cytometry
US8005314B2 (en) * 2005-12-09 2011-08-23 Amnis Corporation Extended depth of field imaging for high speed object analysis
US8406498B2 (en) 1999-01-25 2013-03-26 Amnis Corporation Blood and cell analysis using an imaging flow cytometer
US6684321B1 (en) * 2000-01-04 2004-01-27 Advanced Micro Devices, Inc. Unified memory architecture for use by a main processor and an external processor and method of operation
AU2002213157A1 (en) 2000-10-12 2002-04-22 Amnis Corporation System and method for high numeric aperture imaging systems
DE10051284A1 (de) * 2000-10-16 2002-04-25 Systemonic Ag Datenpfadanordnung
US6622328B2 (en) * 2000-10-31 2003-09-23 Leatherman Tool Group, Inc. Folding multipurpose pocket tool with floating springs
US20030104439A1 (en) * 2001-11-30 2003-06-05 Finch Rosalynde J. Methods of identifying cellular target molecules
CA2596101A1 (en) 2004-03-16 2005-09-29 Amnis Corporation Method for imaging and differential analysis of cells
US8953866B2 (en) 2004-03-16 2015-02-10 Amnis Corporation Method for imaging and differential analysis of cells
US8150136B2 (en) 2004-03-16 2012-04-03 Amnis Corporation Image based quantitation of molecular translocation
US8451524B2 (en) * 2009-09-29 2013-05-28 Amnis Corporation Modifying the output of a laser to achieve a flat top in the laser's Gaussian beam intensity profile
US8817115B1 (en) 2010-05-05 2014-08-26 Amnis Corporation Spatial alignment of image data from a multichannel detector using a reference image
CN102200952A (zh) * 2011-03-28 2011-09-28 杭州中天微系统有限公司 可扩展的层次化嵌入式cpu存储器系统

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3771137A (en) * 1971-09-10 1973-11-06 Ibm Memory control in a multipurpose system utilizing a broadcast
DE2824557C2 (de) * 1978-06-05 1983-01-20 Siemens AG, 1000 Berlin und 8000 München Anordnung in Mikroprozessoren für den Aufbau von Multiprozessor-Systemen
US4257095A (en) * 1978-06-30 1981-03-17 Intel Corporation System bus arbitration, circuitry and methodology
JPS5836374B2 (ja) * 1980-04-11 1983-08-09 パナフアコム株式会社 多重系計算機システムにおけるバス方式
US4414624A (en) * 1980-11-19 1983-11-08 The United States Of America As Represented By The Secretary Of The Navy Multiple-microcomputer processing
US4375639A (en) * 1981-01-12 1983-03-01 Harris Corporation Synchronous bus arbiter
US4417303A (en) * 1981-02-25 1983-11-22 Leeds & Northrup Company Multi-processor data communication bus structure
DD159916A1 (de) * 1981-06-22 1983-04-13 Wolfgang Matthes Mikrorechneranordnung,vorzugsweise fuer den einsatz in multimikrorechnersystemen
US4481572A (en) * 1981-10-13 1984-11-06 Teledyne Industries, Inc. Multiconfigural computers utilizing a time-shared bus
US4495567A (en) * 1981-10-15 1985-01-22 Codex Corporation Multiprocessor/multimemory control system
US4494193A (en) * 1982-09-30 1985-01-15 At&T Bell Laboratories Deadlock detection and resolution scheme

Also Published As

Publication number Publication date
EP0166272A3 (en) 1988-01-07
JPS60258671A (ja) 1985-12-20
JPH0354375B2 (de) 1991-08-20
EP0166272A2 (de) 1986-01-02
EP0166272B1 (de) 1992-01-15
US4737932A (en) 1988-04-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee