DE3580871D1 - Schaltung fuer gemeinsame unterbrechungsniveaus. - Google Patents

Schaltung fuer gemeinsame unterbrechungsniveaus.

Info

Publication number
DE3580871D1
DE3580871D1 DE8585106933T DE3580871T DE3580871D1 DE 3580871 D1 DE3580871 D1 DE 3580871D1 DE 8585106933 T DE8585106933 T DE 8585106933T DE 3580871 T DE3580871 T DE 3580871T DE 3580871 D1 DE3580871 D1 DE 3580871D1
Authority
DE
Germany
Prior art keywords
circuit
interrupt level
common interrupt
common
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585106933T
Other languages
English (en)
Inventor
David John Bradley
William Brooks Ott
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3580871D1 publication Critical patent/DE3580871D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Programmable Controllers (AREA)
  • Logic Circuits (AREA)
  • Measurement Of Current Or Voltage (AREA)
DE8585106933T 1984-07-11 1985-06-05 Schaltung fuer gemeinsame unterbrechungsniveaus. Expired - Lifetime DE3580871D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/629,868 US4631670A (en) 1984-07-11 1984-07-11 Interrupt level sharing

Publications (1)

Publication Number Publication Date
DE3580871D1 true DE3580871D1 (de) 1991-01-24

Family

ID=24524830

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585106933T Expired - Lifetime DE3580871D1 (de) 1984-07-11 1985-06-05 Schaltung fuer gemeinsame unterbrechungsniveaus.

Country Status (14)

Country Link
US (1) US4631670A (de)
EP (1) EP0167827B1 (de)
JP (1) JPH0690699B2 (de)
KR (1) KR900006919B1 (de)
AR (1) AR242455A1 (de)
AU (1) AU571693B2 (de)
BR (1) BR8503044A (de)
CA (1) CA1226957A (de)
DE (1) DE3580871D1 (de)
ES (1) ES8702676A1 (de)
HK (1) HK12492A (de)
MX (1) MX158689A (de)
MY (1) MY100689A (de)
SG (1) SG110791G (de)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4764893A (en) * 1985-04-26 1988-08-16 International Business Machines Corporation Noise-immune interrupt level sharing
US4760516A (en) * 1986-11-25 1988-07-26 Dialogic Corporation Peripheral interrupt interface for multiple access to an interrupt level
US5261084A (en) * 1988-05-06 1993-11-09 Nec Corporation Error judgment method
US5101497A (en) * 1988-09-09 1992-03-31 Compaq Computer Corporation Programmable interrupt controller
CA1319441C (en) * 1988-09-09 1993-06-22 Paul R. Culley Programmable interrupt controller
SE8902718L (sv) * 1988-11-25 1990-05-26 Standard Microsyst Smc Asynkron avbrottsarbitrerare
JPH02224140A (ja) * 1989-02-27 1990-09-06 Nippon Motoroola Kk 割込試験装置
DE8904936U1 (de) * 1989-04-19 1989-06-01 Force Computers GmbH, 8012 Ottobrunn Computer mit einer Mehrzahl von steckbaren Baugruppen
US5187781A (en) * 1989-12-19 1993-02-16 International Business Machines Corp. Shared hardware interrupt circuit for personal computers
JPH047641A (ja) * 1990-04-25 1992-01-13 Mitsubishi Electric Corp 割込制御装置
JPH0485630A (ja) * 1990-07-30 1992-03-18 Toshiba Corp 割込み制御装置
EP0473806A1 (de) * 1990-09-03 1992-03-11 International Business Machines Corporation Vorrichtung und Verfahren zur Fehlererkennung und -isolierung
JPH04318654A (ja) * 1991-02-13 1992-11-10 Hewlett Packard Co <Hp> マイクロプロセッサへの割り込みのリダイレクションシステム
JP2837970B2 (ja) * 1991-04-12 1998-12-16 三菱電機株式会社 Ｉｃカード
US5448725A (en) * 1991-07-25 1995-09-05 International Business Machines Corporation Apparatus and method for error detection and fault isolation
US5404457A (en) * 1992-02-14 1995-04-04 Advanced Micro Devices, Inc. Apparatus for managing system interrupt operations in a computing system
US5448743A (en) * 1992-07-21 1995-09-05 Advanced Micro Devices, Inc. General I/O port interrupt mechanism
US5438677A (en) * 1992-08-17 1995-08-01 Intel Corporation Mutual exclusion for computer system
US5463752A (en) * 1992-09-23 1995-10-31 International Business Machines Corporation Method and system for enhancing the efficiency of communication between multiple direct access storage devices and a storage system controller
US5475846A (en) * 1993-08-11 1995-12-12 Databook Incorporated Apparatus for processing PCMCIA interrupt requests
US5734844A (en) * 1993-10-08 1998-03-31 Cyrix Corporation Bidirectional single-line handshake with both devices driving the line in the same state for hand-off
US6023743A (en) * 1997-06-10 2000-02-08 International Business Machines Corporation System and method for arbitrating interrupts on a daisy chained architected bus
US6279067B1 (en) * 1999-01-13 2001-08-21 Ati International Srl Method and apparatus for detecting interrupt requests in video graphics and other systems
JP3478994B2 (ja) * 1999-05-31 2003-12-15 株式会社日立製作所 センサ装置
DE10047183A1 (de) * 2000-09-22 2002-04-18 Infineon Technologies Ag Digitales Zwischenspeicherbauelement
US6742060B2 (en) 2000-12-29 2004-05-25 Intel Corporation Look-up table based circuitry for sharing an interrupt between disk drive interfaces
US6772258B2 (en) * 2000-12-29 2004-08-03 Intel Corporation Method and apparatus for sharing an interrupt between disk drive interfaces
US6795884B2 (en) 2000-12-29 2004-09-21 Intel Corporation Read-only memory based circuitry for sharing an interrupt between disk drive interfaces
US6738848B2 (en) * 2000-12-29 2004-05-18 Intel Corporation Decoder-based circuitry for sharing an interrupt between disk drive interfaces
US6823413B2 (en) * 2001-06-08 2004-11-23 Oki Electronic Industry Co., Ltd. Interrupt signal processing apparatus
US20030093570A1 (en) * 2001-06-25 2003-05-15 Bissett Thomas D. Fault tolerant processing
CN1317654C (zh) * 2004-03-17 2007-05-23 致伸科技股份有限公司 边沿触发中断共享方法
US20050262376A1 (en) * 2004-05-21 2005-11-24 Mcbain Richard A Method and apparatus for bussed communications
CN1983220B (zh) * 2005-12-17 2010-05-05 鸿富锦精密工业（深圳）有限公司 多信号源共用信号输入电路
US9489618B2 (en) * 2014-05-27 2016-11-08 Purdue Research Foudation Electronic comparison systems

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3597743A (en) * 1969-03-26 1971-08-03 Digital Applic Inc Expander for real-time communication between a computer and external devices
US3665415A (en) * 1970-04-29 1972-05-23 Honeywell Inf Systems Data processing system with program interrupt priority apparatus utilizing working store for multiplexing interrupt requests
FR2273317B1 (de) * 1974-05-28 1976-10-15 Philips Electrologica
US4041471A (en) * 1975-04-14 1977-08-09 Scientific Micro Systems, Inc. Data processing system including a plurality of programmed machines and particularly including a supervisor machine and an object machine
US4035780A (en) * 1976-05-21 1977-07-12 Honeywell Information Systems, Inc. Priority interrupt logic circuits
US4090238A (en) * 1976-10-04 1978-05-16 Rca Corporation Priority vectored interrupt using direct memory access
JPS5363829A (en) * 1976-11-18 1978-06-07 Sanyo Electric Co Ltd Generation control system of interrupt signal and interrupt circuit its execution
BE887134A (fr) * 1979-12-14 1981-05-14 Gte Automatic Electric Lab Inc Circuit expanseur d'interruption
US4420806A (en) * 1981-01-15 1983-12-13 Harris Corporation Interrupt coupling and monitoring system
US4419762A (en) * 1982-02-08 1983-12-06 Sperry Corporation Asynchronous status register

Also Published As

Publication number Publication date
BR8503044A (pt) 1986-03-11
JPH0690699B2 (ja) 1994-11-14
AR242455A1 (es) 1993-03-31
KR860001382A (ko) 1986-02-26
AU4255085A (en) 1986-01-16
HK12492A (en) 1992-02-21
EP0167827B1 (de) 1990-12-12
EP0167827A3 (en) 1986-08-27
CA1226957A (en) 1987-09-15
ES545026A0 (es) 1986-12-16
KR900006919B1 (en) 1990-09-24
AU571693B2 (en) 1988-04-21
US4631670A (en) 1986-12-23
MX158689A (es) 1989-02-27
SG110791G (en) 1992-02-14
EP0167827A2 (de) 1986-01-15
ES8702676A1 (es) 1986-12-16
MY100689A (en) 1991-01-17
JPS6128154A (ja) 1986-02-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition