Classifications

• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
  • G06F13/14—Handling requests for interconnection or transfer
  • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
  • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
  • G06F13/10—Program control for peripheral devices
  • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
  • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
  • G06F13/128—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine for dedicated transfers to a network
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
  • G06F13/38—Information transfer, e.g. on bus
  • G06F13/40—Bus structure
  • G06F13/4004—Coupling between buses
  • G06F13/4027—Coupling between buses using bus bridges
  • G06F13/404—Coupling between buses using bus bridges with address mapping

Landscapes

• Engineering & Computer Science (AREA)
• Theoretical Computer Science (AREA)
• General Engineering & Computer Science (AREA)
• Physics & Mathematics (AREA)
• General Physics & Mathematics (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Bus Control (AREA)
• Microcomputers (AREA)
• Iron Core Of Rotating Electric Machines (AREA)

Applications Claiming Priority (1)

Publications (3)

Family

ID=25017855

Family Applications (1)

Country Status (7)

Families Citing this family (5)

Family Cites Families (3)

• 1986
  • 1986-05-07 NO NO861836A patent/NO173305C/no unknown
  • 1986-05-12 CA CA000508902A patent/CA1259707A/en not_active Expired
  • 1986-05-16 ZA ZA863643A patent/ZA863643B/xx unknown
  • 1986-06-27 AU AU59412/86A patent/AU589649B2/en not_active Ceased
  • 1986-06-28 EP EP86108813A patent/EP0207472A3/en not_active Ceased
  • 1986-07-01 JP JP61154961A patent/JPS629455A/ja active Pending
  • 1986-09-25 IN IN270/BOM/86A patent/IN164933B/en unknown

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