DE3689689D1 - Hochzuverlässiges Rechnersystem. - Google Patents

Hochzuverlässiges Rechnersystem.

Info

Publication number
DE3689689D1
DE3689689D1 DE86117940T DE3689689T DE3689689D1 DE 3689689 D1 DE3689689 D1 DE 3689689D1 DE 86117940 T DE86117940 T DE 86117940T DE 3689689 T DE3689689 T DE 3689689T DE 3689689 D1 DE3689689 D1 DE 3689689D1
Authority
DE
Germany
Prior art keywords
computer system
highly reliable
reliable computer
highly
reliable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE86117940T
Other languages
English (en)
Other versions
DE3689689T2 (de
Inventor
Toshio C O Nec Corpora Kikuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE3689689D1 publication Critical patent/DE3689689D1/de
Application granted granted Critical
Publication of DE3689689T2 publication Critical patent/DE3689689T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/183—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Detection And Correction Of Errors (AREA)
DE3689689T 1985-12-24 1986-12-23 Hochzuverlässiges Rechnersystem. Expired - Fee Related DE3689689T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60295590A JPH0778750B2 (ja) 1985-12-24 1985-12-24 高信頼性コンピュータ方式

Publications (2)

Publication Number Publication Date
DE3689689D1 true DE3689689D1 (de) 1994-04-07
DE3689689T2 DE3689689T2 (de) 1994-09-22

Family

ID=17822596

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3689689T Expired - Fee Related DE3689689T2 (de) 1985-12-24 1986-12-23 Hochzuverlässiges Rechnersystem.

Country Status (4)

Country Link
US (1) US4794601A (de)
EP (1) EP0228071B1 (de)
JP (1) JPH0778750B2 (de)
DE (1) DE3689689T2 (de)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63159944A (ja) * 1986-12-24 1988-07-02 Nec Corp 高信頼性コンピュ−タ方式
AU616213B2 (en) * 1987-11-09 1991-10-24 Tandem Computers Incorporated Method and apparatus for synchronizing a plurality of processors
US5052673A (en) * 1988-09-09 1991-10-01 Brother Kogyo Kabushiki Kaisha Sheet feeding device
AU625293B2 (en) * 1988-12-09 1992-07-09 Tandem Computers Incorporated Synchronization of fault-tolerant computer system having multiple processors
US4965717A (en) * 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
US5295258A (en) * 1989-12-22 1994-03-15 Tandem Computers Incorporated Fault-tolerant computer system with online recovery and reintegration of redundant components
US5203004A (en) * 1990-01-08 1993-04-13 Tandem Computers Incorporated Multi-board system having electronic keying and preventing power to improperly connected plug-in board with improperly configured diode connections
US5430740A (en) * 1992-01-21 1995-07-04 Nokia Mobile Phones, Ltd. Indication of data blocks in a frame received by a mobile phone
US5987639A (en) * 1992-01-21 1999-11-16 Nokia Mobile Phones Ltd. Data decoding logic in a mobile phone
US5428769A (en) * 1992-03-31 1995-06-27 The Dow Chemical Company Process control interface system having triply redundant remote field units
JP2514053Y2 (ja) * 1992-12-29 1996-10-16 東名通信工業株式会社 ロ―ゼット
US5426653A (en) * 1993-07-28 1995-06-20 Motorola, Inc. Method and apparatus for performing error correction on a signal received by a radio communication device
JP3526492B2 (ja) * 1995-09-19 2004-05-17 富士通株式会社 並列処理システム
US6044487A (en) * 1997-12-16 2000-03-28 International Business Machines Corporation Majority voting scheme for hard error sites
US7206891B2 (en) * 2002-09-26 2007-04-17 Lsi Logic Corporation Multi-port memory controller having independent ECC encoders
US7089484B2 (en) * 2002-10-21 2006-08-08 International Business Machines Corporation Dynamic sparing during normal computer system operation
TW578160B (en) * 2002-11-29 2004-03-01 Via Tech Inc Memory modeling circuit with fault tolerant
DE10301504B3 (de) * 2003-01-17 2004-10-21 Phoenix Contact Gmbh & Co. Kg Einsignalübertragung sicherer Prozessinformation
JP5699057B2 (ja) * 2011-08-24 2015-04-08 株式会社日立製作所 プログラマブルデバイス、プログラマブルデバイスのリコンフィグ方法および電子デバイス
CN102606331A (zh) * 2012-03-20 2012-07-25 西安航天动力试验技术研究所 三冗余表决控制系统及方法
DE102013202253A1 (de) * 2013-02-12 2014-08-14 Paravan Gmbh Schaltung zur Steuerung eines Beschleunigungs-, Brems- und Lenksystems eines Fahrzeugs
CN103731130B (zh) * 2013-12-27 2017-01-04 华为技术有限公司 通用的容错纠错电路及其应用的译码器和三模冗余电路
JP2015222467A (ja) * 2014-05-22 2015-12-10 ルネサスエレクトロニクス株式会社 マイクロコントローラ及びそれを用いた電子制御装置
US10481963B1 (en) * 2016-06-29 2019-11-19 Amazon Technologies, Inc. Load-balancing for achieving transaction fault tolerance
GB201617408D0 (en) 2016-10-13 2016-11-30 Asio Ltd A method and system for acoustic communication of data
GB201617409D0 (en) 2016-10-13 2016-11-30 Asio Ltd A method and system for acoustic communication of data
CN106527115B (zh) * 2016-10-31 2019-07-02 中国核动力研究设计院 一种二取一冗余控制系统及其多重表决方法
GB2565751B (en) 2017-06-15 2022-05-04 Sonos Experience Ltd A method and system for triggering events
GB2570634A (en) 2017-12-20 2019-08-07 Asio Ltd A method and system for improved acoustic transmission of data
CN107945314B (zh) * 2017-12-27 2024-02-06 中国人民解放军战略支援部队航天工程大学 一种航天器飞行数据分析记录设备、系统和方法
CN110824988B (zh) * 2019-11-06 2021-02-09 上海航天控制技术研究所 一种基于1553b总线冗余的姿控输出信号表决方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3863215A (en) * 1973-07-03 1975-01-28 Rca Corp Detector for repetitive digital codes
DE2418924A1 (de) * 1974-04-19 1975-11-06 Siemens Ag Schaltungsanordnung zum gesicherten verarbeiten von digital dargestellten informationen
US4375683A (en) * 1980-11-12 1983-03-01 August Systems Fault tolerant computational system and voter circuit
JPS5839050A (ja) * 1981-09-01 1983-03-07 Nec Corp 集積回路
US4536878A (en) * 1982-09-20 1985-08-20 Sperry Corporation Bit serial convolutional decoder for VLSI implementation
US4569050A (en) * 1983-01-14 1986-02-04 Honeywell Inc. Data communication system with fixed weight error correction and detection code
CA1225746A (en) * 1984-03-30 1987-08-18 Hirohisa Shishikura Error correction system for difference set cyclic code in a teletext system
US4667327A (en) * 1985-04-02 1987-05-19 Motorola, Inc. Error corrector for a linear feedback shift register sequence

Also Published As

Publication number Publication date
JPH0778750B2 (ja) 1995-08-23
EP0228071A3 (en) 1989-11-08
JPS62150439A (ja) 1987-07-04
EP0228071A2 (de) 1987-07-08
DE3689689T2 (de) 1994-09-22
EP0228071B1 (de) 1994-03-02
US4794601A (en) 1988-12-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee