DE3577946D1 - Schutzschicht fuer iii-v- und ii-vi-verbindungshalbleiter. - Google Patents

Schutzschicht fuer iii-v- und ii-vi-verbindungshalbleiter.

Info

Publication number
DE3577946D1
DE3577946D1 DE8585904953T DE3577946T DE3577946D1 DE 3577946 D1 DE3577946 D1 DE 3577946D1 DE 8585904953 T DE8585904953 T DE 8585904953T DE 3577946 T DE3577946 T DE 3577946T DE 3577946 D1 DE3577946 D1 DE 3577946D1
Authority
DE
Germany
Prior art keywords
iii
protective layer
semiconductors
connection
connection semiconductors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585904953T
Other languages
English (en)
Inventor
Irfan Camlibel
Kwang-Yu Chin
Shobha Singh
Uitert Gerard Van
John Zydzik
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
American Telephone and Telegraph Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone and Telegraph Co Inc filed Critical American Telephone and Telegraph Co Inc
Application granted granted Critical
Publication of DE3577946D1 publication Critical patent/DE3577946D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H01L21/3245Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering of AIIIBV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/46Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/469Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers
    • H01L21/471Inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/902Capping layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/945Special, e.g. metal

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Formation Of Insulating Films (AREA)
DE8585904953T 1984-10-09 1985-10-03 Schutzschicht fuer iii-v- und ii-vi-verbindungshalbleiter. Expired - Fee Related DE3577946D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/658,569 US4634474A (en) 1984-10-09 1984-10-09 Coating of III-V and II-VI compound semiconductors
PCT/US1985/001930 WO1986002488A1 (en) 1984-10-09 1985-10-03 Coating of iii-v and ii-vi compound semiconductors

Publications (1)

Publication Number Publication Date
DE3577946D1 true DE3577946D1 (de) 1990-06-28

Family

ID=24641786

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585904953T Expired - Fee Related DE3577946D1 (de) 1984-10-09 1985-10-03 Schutzschicht fuer iii-v- und ii-vi-verbindungshalbleiter.

Country Status (6)

Country Link
US (1) US4634474A (de)
EP (1) EP0202240B1 (de)
JP (1) JPS62500414A (de)
CA (1) CA1250055A (de)
DE (1) DE3577946D1 (de)
WO (1) WO1986002488A1 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4615766A (en) * 1985-02-27 1986-10-07 International Business Machines Corporation Silicon cap for annealing gallium arsenide
DE3685279D1 (de) * 1985-09-20 1992-06-17 Sumitomo Electric Industries Verfahren zur waermebehandlung eines verbindungshalbleitersubstrats.
US4860066A (en) * 1987-01-08 1989-08-22 International Business Machines Corporation Semiconductor electro-optical conversion
US4830983A (en) * 1987-11-05 1989-05-16 Xerox Corporation Method of enhanced introduction of impurity species into a semiconductor structure from a deposited source and application thereof
US4824798A (en) * 1987-11-05 1989-04-25 Xerox Corporation Method of introducing impurity species into a semiconductor structure from a deposited source
US4849033A (en) * 1988-04-21 1989-07-18 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Annealing Group III-V compound doped silicon-germanium alloy for improved thermo-electric conversion efficiency
US5086321A (en) * 1988-06-15 1992-02-04 International Business Machines Corporation Unpinned oxide-compound semiconductor structures and method of forming same
US4987095A (en) * 1988-06-15 1991-01-22 International Business Machines Corp. Method of making unpinned oxide-compound semiconductor structures
US5098851A (en) * 1989-02-10 1992-03-24 Hitachi, Ltd. Fabricating a semiconductor photodetector by annealing to smooth the PN junction
US5210052A (en) * 1989-05-18 1993-05-11 Fujitsu Limited Method for fabricating a semiconductor substrate
US5188978A (en) * 1990-03-02 1993-02-23 International Business Machines Corporation Controlled silicon doping of III-V compounds by thermal oxidation of silicon capping layer
US5312780A (en) * 1992-12-16 1994-05-17 At&T Bell Laboratories Integrated circuit fabrication method
US5420445A (en) * 1993-02-22 1995-05-30 Texas Instruments Incorporated Aluminum-masked and radiantly-annealed group II-IV diffused region
US5821567A (en) * 1995-12-13 1998-10-13 Oki Electric Industry Co., Ltd. High-resolution light-sensing and light-emitting diode array
JP3399216B2 (ja) * 1996-03-14 2003-04-21 ソニー株式会社 半導体発光素子
JPH11220161A (ja) * 1998-01-30 1999-08-10 Oki Electric Ind Co Ltd 発光ダイオード及び発光ダイオードの製造方法
JP4221818B2 (ja) * 1999-05-28 2009-02-12 沖電気工業株式会社 光半導体素子の製造方法
AU2001287993A1 (en) 2000-09-28 2002-04-08 Maris Algeri Container
US7378689B2 (en) * 2005-10-17 2008-05-27 Princeton Lightwave, Inc. Apparatus comprising an avalanche photodiode
US7553734B2 (en) * 2005-10-17 2009-06-30 Princeton Lightwave, Inc. Method for forming an avalanche photodiode
US9793252B2 (en) 2015-03-30 2017-10-17 Emagin Corporation Method of integrating inorganic light emitting diode with oxide thin film transistor for display applications

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1053046A (de) * 1963-02-25 1900-01-01
US3890169A (en) * 1973-03-26 1975-06-17 Bell Telephone Labor Inc Method of forming stable native oxide on gallium arsenide based compound semiconductors by combined drying and annealing
US3755016A (en) * 1972-03-20 1973-08-28 Motorola Inc Diffusion process for compound semiconductors
DE2214224C3 (de) * 1972-03-23 1978-05-03 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Bildung von pn-Übergängen in III-V-Halbleiter-Einkristallen
JPS5193874A (en) * 1975-02-15 1976-08-17 Handotaisochino seizohoho
DE2642413A1 (de) * 1976-09-21 1978-03-23 Siemens Ag Verfahren zum aufbringen einer aus silicium bestehenden passivierungsschicht
US4087293A (en) * 1977-01-06 1978-05-02 Honeywell Inc. Silicon as donor dopant in Hg1-x Cdx Te
US4089714A (en) * 1977-01-06 1978-05-16 Honeywell Inc. Doping mercury cadmium telluride with aluminum or silicon
GB1574525A (en) * 1977-04-13 1980-09-10 Philips Electronic Associated Method of manufacturing semiconductor devices and semiconductor devices manufactured by the method
US4172906A (en) * 1977-05-11 1979-10-30 Rockwell International Corporation Method for passivating III-V compound semiconductors
US4194934A (en) * 1977-05-23 1980-03-25 Varo Semiconductor, Inc. Method of passivating a semiconductor device utilizing dual polycrystalline layers
US4396437A (en) * 1981-05-04 1983-08-02 Hughes Aircraft Company Selective encapsulation, controlled atmosphere annealing for III-V semiconductor device fabrication
JPS58103122A (ja) * 1981-12-15 1983-06-20 Nec Corp 化合物半導体装置の製造方法
US4396443A (en) * 1982-01-18 1983-08-02 Bell Telephone Laboratories, Incorporated Reduction of leakage current in InGaAs diodes
US4493142A (en) * 1982-05-07 1985-01-15 At&T Bell Laboratories III-V Based semiconductor devices and a process for fabrication
US4494997A (en) * 1983-06-15 1985-01-22 Westinghouse Electric Corp. Ion implant mask and cap for gallium arsenide structures
US4501625A (en) * 1983-12-23 1985-02-26 Texas Instruments Incorporated Method of producing homogeneously doped HgCdTe which contains a fast diffusing dopant impurity

Also Published As

Publication number Publication date
WO1986002488A1 (en) 1986-04-24
EP0202240B1 (de) 1990-05-23
EP0202240A1 (de) 1986-11-26
CA1250055A (en) 1989-02-14
JPS62500414A (ja) 1987-02-19
US4634474A (en) 1987-01-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: BLUMBACH, KRAMER & PARTNER, 65193 WIESBADEN

8339 Ceased/non-payment of the annual fee