DE3504949A1 - Integrierte elektronische komponente fuer den oberflaechenaufbau - Google Patents

Integrierte elektronische komponente fuer den oberflaechenaufbau

Info

Publication number
DE3504949A1
DE3504949A1 DE19853504949 DE3504949A DE3504949A1 DE 3504949 A1 DE3504949 A1 DE 3504949A1 DE 19853504949 DE19853504949 DE 19853504949 DE 3504949 A DE3504949 A DE 3504949A DE 3504949 A1 DE3504949 A1 DE 3504949A1
Authority
DE
Germany
Prior art keywords
electronic component
integrated electronic
surface structure
rod
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19853504949
Other languages
English (en)
Inventor
Carlo Cognetti De Martiis
Giuseppe Mailand/Milano Marchisi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
ATES Componenti Elettronici SpA
SGS ATES Componenti Elettronici SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ATES Componenti Elettronici SpA, SGS ATES Componenti Elettronici SpA filed Critical ATES Componenti Elettronici SpA
Publication of DE3504949A1 publication Critical patent/DE3504949A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H01L23/49555—Cross section geometry characterised by bent parts the bent parts being the outer leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

Integrierte elektronische Komponente für den Oberflächenaufbau
BESCHREIBUNG
Die Erfindung bezieht sich auf eine integrierte elektronische Komponente für den Oberflächenaufbau, insbesondere vom Mikro-Packungstyp (micro package).
Es ist bekannt, daß der hohe thermische Widerstand (Rth) ein wichtiges Problem der bekannten integrierten elektronischen Komponenten, insbesondere solcher mit sehr kleiner Größe, wie zum Beispiel der sogenannten Mikro-Packungen (micro packages) darstellt, der die zufriedenstellende Wärmeabstrahlung des in der Harzpackung eingebetteten Halbleiterwafers verhindert.
Aufgabe der Erfindung ist es, eine integrierte elektronische Komponente, insbesondere eine Mikro-Packung zu realisieren, die verbesserte Merkmale der Wärmeabstrahlung zeigt.
Erfindungsgemäß wird eine solche Aufgabe durch eine integrierte elektronische Komponente gelöst, die ein vorgeformtes isolierendes Gehäuse mit einem inneren Raum zur Aufnahme eines Halbleiterwafers, der elektrisch mit äußeren elektrischen Kontakten verbunden ist, aufweist, dadurch gekennzeichnet, daß diese eine Stange aus einem Material mit hoher thermischer Leitfähigkeit, insbesondere aus Kupfer, einschließt, die in das isolierende Gehäuse zur Aufnahme des Wafers eingebettet ist.
INSPECTED
Es konnte bestätigt werden, daß das Einschließen einer solchen Kupferstange (oder eines anderen ähnlichen Materials) den thermischen Widerstand stark reduziert und daher die Wärmeabstrahlung vergrößert. Darüber hinaus ist es, da die Stange gleichfalls ein Element mechanischen Widerstandes darstellt, möglich, lineare Komponenten vergrößerter Länge herzustellen.
Weitere Merkmale und Zweckmäßigkeiten der Erfindung ergeben sich aus der Beschreibung eines AusfUhrungsbeispieles anhand der Figuren. Von den Figuren zeigen:
Fig. 1 eine perspektivische Ansicht der Komponente;
Fig. 2 dieselbe Komponente in einem Querschnitt entlang der Linie II-II von Fig. 1.
Die in der Zeichnung gezeigte Komponente weist ein harzvorgeformtes Gehäuse 1 auf, in das eine Kupferstange 2 eingebettet ist.
In dem Gehäuse 1 wird ein innerer Raum 3 gebildet, in den ein Halbleiterwafer 4 eingebaut ist, der auf einer Kupferstange 2 angeordnet und elektrisch über Kontaktdrähte 5 mit den äußeren elektrischen Kontakten 6 verbunden ist, die an zwei gegenüberliegenden Seiten des Gehäuses 1 abgewinkelt sind.
Eine Harzabdeckung 7 schließt den oberen Raum 3, so daß das Wafer darin geschützt eingebaut ist.
-t.
L ο e r s e i t e

Claims (2)

  1. PATENTANWALT DIPL.-PHYS. LUTZ H. PRÜFER · D-8OOO MÜNCHEN 9O
    MM 16-3340 P/Ka/hu
    SGS-ATES Componenti Elettronici S.p.A., Catania / Italien
    Integrierte elektronische Komponente für den Oberflächenaufbau
    PATENTANSPRÜCHE
    . Integrierte elektronische Komponente für den Oberflächenaufbau, mit einem isolierenden vorgeformten Gehäuse (l), das einen inneren Raum (3) zur Aufnahme des Halb 1 eitnrwafers (4), der elektrisch mit äußeren elektrischen Kontakten (6) verbunden werden kann, aufweist,
    dadurch gekennzeichnet, daß diese eine Stange {?.) aus einem Material mit hoher thermischer Leitfähigkeit, die in das isolierende Gehäuse (1) eingebettet ist, zur Abstützung des Wafers (4) aufweist.
  2. 2. Elektronische Komponente nach Anspruch 1, dadurch gekennzeichnet, daß die Stange (2) aus Kupfer hergestellt ist.
    PATENTANWALT DIPL.-PHYS. LUTZ H PRÜFER D-8000 MÜNCHEN ΘΟ HARTHAUSER STR 25d TEL (O 89) 640 640.
DE19853504949 1984-02-17 1985-02-13 Integrierte elektronische komponente fuer den oberflaechenaufbau Withdrawn DE3504949A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8419669A IT1213140B (it) 1984-02-17 1984-02-17 Componente elettronico integrato per assemblaggio di superficie.

Publications (1)

Publication Number Publication Date
DE3504949A1 true DE3504949A1 (de) 1985-08-22

Family

ID=11160247

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19853504949 Withdrawn DE3504949A1 (de) 1984-02-17 1985-02-13 Integrierte elektronische komponente fuer den oberflaechenaufbau

Country Status (5)

Country Link
JP (1) JPS60233843A (de)
DE (1) DE3504949A1 (de)
FR (1) FR2559955B1 (de)
GB (1) GB2154791A (de)
IT (1) IT1213140B (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4213251A1 (de) * 1991-04-23 1992-10-29 Mitsubishi Electric Corp Halbleiterbaustein und verfahren zu dessen herstellung sowie behaelter zur ummantelung eines halbleiterelements

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2292003A (en) * 1994-07-29 1996-02-07 Ibm Uk Direct chip attach
US5625226A (en) * 1994-09-19 1997-04-29 International Rectifier Corporation Surface mount package with improved heat transfer
JP2924854B2 (ja) * 1997-05-20 1999-07-26 日本電気株式会社 半導体装置、その製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1239634A (de) * 1968-10-02 1971-07-21
GB1289932A (de) * 1971-03-30 1972-09-20
US3930114A (en) * 1975-03-17 1975-12-30 Nat Semiconductor Corp Integrated circuit package utilizing novel heat sink structure
GB2022317A (en) * 1978-05-31 1979-12-12 Burroughs Corp Method of forming a plastic cavity package for integrated circuit devices
US4420767A (en) * 1978-11-09 1983-12-13 Zilog, Inc. Thermally balanced leadless microelectronic circuit chip carrier
FR2488445A1 (fr) * 1980-08-06 1982-02-12 Efcis Boitier plastique pour circuits integres
US4630172A (en) * 1983-03-09 1986-12-16 Printed Circuits International Semiconductor chip carrier package with a heat sink

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4213251A1 (de) * 1991-04-23 1992-10-29 Mitsubishi Electric Corp Halbleiterbaustein und verfahren zu dessen herstellung sowie behaelter zur ummantelung eines halbleiterelements

Also Published As

Publication number Publication date
FR2559955B1 (fr) 1988-01-15
GB2154791A (en) 1985-09-11
GB8503303D0 (en) 1985-03-13
IT1213140B (it) 1989-12-14
JPS60233843A (ja) 1985-11-20
FR2559955A1 (fr) 1985-08-23
IT8419669A0 (it) 1984-02-17

Similar Documents

Publication Publication Date Title
EP1565948B1 (de) Optoelektronisches bauelement
EP0654820B1 (de) Halbleiter-Modul mit konvexer Bodenplatte
DE19921109B4 (de) Elektronikbauteil und Elektronikkomponente mit einem Keramikbauteilelement
DE19950026B4 (de) Leistungshalbleitermodul
DE10324909B4 (de) Gehäuse für ein strahlungsemittierendes Bauelement, Verfahren zu dessen Herstellung und strahlungsemittierendes Bauelement
DE4126043C2 (de) Gekapseltes Halbleiterbauelement
DE29825022U1 (de) Optoelektronisches Bauelement
DE2811933A1 (de) Andrueckbare halbleiter-pelletanordnung
DE69220601T2 (de) Schichtwiderstand
DE2712543A1 (de) In harz vergossene halbleitervorrichtung und verfahren zu ihrer herstellung
WO1998039733A1 (de) Chipkartenmodul und diesen umfassende chipkarte
EP3823018A1 (de) Elektronikmodul mit einer pulsierenden heatpipe
DE4316639A1 (de) Halbleitervorrichtung und Verfahren zu ihrer Herstellung
DE3504949A1 (de) Integrierte elektronische komponente fuer den oberflaechenaufbau
DE60020509T2 (de) Elektronische baugruppe mit einer wärmeplatte
DE2310051B2 (de) Leistungshalbleiterbauelement
DE3731969C2 (de)
DE1489916A1 (de) Halbleitervorrichtung
DE2252830C2 (de) Halbleiterbauelement mit einem Halbleiterelement in einem hermetisch geschlossenen Gehäuse
DE102006015222B4 (de) QFN-Gehäuse mit optimierter Anschlussflächengeometrie
DE102005007486B4 (de) Halbleiterbauteil mit oberflächenmontierbarem Gehäuse, Montageanordnung und Verfahren zur Herstellung desselben
CH676531A5 (de)
DE2904806A1 (de) Elektrisches bauteil
DE19828664C2 (de) Raumsparende Halbleiteranordnung mit mindestens zwei Halbleiterchips insbesondere geeignet zur Temperaturüberwachung und Verfahren zum Herstellen einer derartigen Halbleiteranordnung
DE29902754U1 (de) Häusung für ein Halbleiterchip

Legal Events

Date Code Title Description
8141 Disposal/no request for examination